ADP3168 Analog Devices, ADP3168 Datasheet - Page 6

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ADP3168

Manufacturer Part Number
ADP3168
Description
4-Phase Synchronous Buck Controller
Manufacturer
Analog Devices
Datasheet

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ADP3168
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1 to 6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 to 23
24 to 27
28
4
Mnemonic
VID4 to VID0, VID5
FBRTN
FB
COMP
PWRGD
EN
DELAY
RT
RAMPADJ
ILIMIT
CSREF
CSSUM
CSCOMP
GND
SW4 to SW1
PWM4 to PWM1
VCC
Function
Voltage Identification DAC Inputs. These six pins are pulled up to an internal reference, providing a Logic 1
if left open. When in normal operation mode, the DAC output programs the FB regulation voltage from
0.8375 V to 1.6 V. Leaving VID4 through VID0 open results in the ADP3168 going into a no CPU mode,
shutting off its PWM outputs.
Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage.
Feedback Input. Error amplifier input for remote sensing of the output voltage. An external resistor
between this pin and the output voltage sets the no -load offset point.
Error Amplifier Output and Compensation Point.
Power Good Output. Open-drain output that pulls to GND when the output voltage is outside the proper
operating range.
Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs.
Soft-Start Delay and Current Limit Latch-Off Delay Setting Input. An external resistor and capacitor
connected between this pin and GND set the soft-start ramp-up time and the overcurrent latch-off delay
time.
Frequency Setting Resistor Input. An external resistor connected between this pin and GND sets the
oscillator frequency of the device.
PWM Ramp Current Input. An external resistor from the converter input voltage to this pin sets the internal
PWM ramp.
Current Limit Set Point/Enable Output. An external resistor from this pin to GND sets the current limit
threshold of the converter. This pin is actively pulled low when the ADP3168 EN input is low or when VCC
is below its UVLO threshold to signal to the driver IC that the driver high-side and low-side outputs should
go low.
Current Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current-
sense amplifier and the Power Good and crowbar functions. This pin should be connected to the common
point of the output inductors.
Current-Sense Summing Node. External resistors from each switch node to this pin sum the average
inductor currents to measure the total output current.
Current Sense Compensation Point. A resistor and a capacitor from this pin to CSSUM determine the slope
of the load line and the positioning loop response time.
Ground. All internal biasing and the logic output signals of the device are referenced to this ground.
Current Balance Inputs. Inputs for measuring the current level in each phase. The SW pins of unused
phases should be left open.
Logic-Level PWM Outputs. Each output is connected to the input of an external MOSFET driver, such as the
ADP3413 or ADP3418. Connecting the PWM3 and/or PWM4 outputs to GND causes that phase to turn off,
allowing the ADP3168 to operate as a 2-, 3 -, or 4 -phase controller.
Supply Voltage for the Device.
RAMPADJ
PWRGD
FBRTN
DELAY
COMP
VID4
VID3
VID2
VID1
VID0
VID5
EN
FB
RT
Figure 2. Pin Configuration
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Rev. B | Page 6 of 24
(Not to Scale)
ADP3168
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
PWM1
PWM2
PWM3
PWM4
SW1
SW2
SW3
SW4
GND
CSCOMP
CSSUM
CSREF
ILIMIT

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