ADP3168 Analog Devices, ADP3168 Datasheet - Page 22

• Manufacturer Part Number: ADP3168
• Description: 4-Phase Synchronous Buck Controller
• Manufacturer: Analog Devices

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ADP3168
AC Loadline Setting
11. Remove dc load from circuit and hook up dynamic load.
12. Hook up scope to output voltage and set to dc coupling
13. Set dynamic load for a transient step of about 40 A at 1
14. Measure output waveform (may have to use dc offset on
15. This waveform should look something like Figure 15. Use
16. If the V
17. Repeat Steps 11 to 13, making adjustments if necessary.
18. Set dynamic load step to maximum step size (do not use a
Initial Transient Setting
19. With dynamic load still set at maximum step size, expand
4
with time scale at 100 µs/div.
kHz with 50% duty cycle.
scope to see waveform). Try to use vertical scale of 100
mV/div or finer.
the horizontal cursors to measure V
shown. Do not measure the undershoot or overshoot that
happens immediately after the step.
millivolts, use Equation 38 to adjust C
values to get the right one because there are limited
standard capacitor values available. (Make sure that there
are locations for two capacitors in the layout for this.)
Once complete, do not change C
step size larger than needed) and verify that the output
waveform is square (which means V
equal).Make sure load step slew rate and turn-on are set for
a slew rate of ~150 A/µs to 250 A/µs (for example, a load
step of 50 A should take 200 ns to 300 ns) with no overshoot.
Some dynamic loads have an excessive turn-on overshoot if
a minimum current is not set properly. (This is an issue if
using a VTT tool.)
scope time scale to see 2 µs/div to 5 µs/div. The waveform
may have two overshoots and one minor undershoot (see
Figure 16). Here, V
C
CS
(
NEW
ACDRP
)
=
C
CS
and V
Figure 15. AC Loadline Waveform
(
OLD
)
DCDRP
DROOP
×
V
V
ACDRP
DCDRP
are different by more than a few
is the final desired value.
CS
V
ACDRP
again in the procedure.
ACDRP
ACDRP
CS.
Parallel different
and V
and V
V
DCDRP
DCDRP
DCDRP
(38)
as
are
Rev. B | Page 22 of 24
20. If both overshoots are larger than desired, try making the
21. For load release (see Figure 17), if V
Because the ADP3168 turns off all of the phases (switches
inductors to ground), there is no ripple voltage present during
load release. Thus, you do not have to add headroom for ripple,
allowing your load release V
the amount of ripple and still meet specifications.
If V
implies that capacitors can be removed. When removing
capacitors, check the output ripple voltage as well to make sure
it is still within specifications.
TRAN1
adjustments described below. (Note: If these adjustments
do not change the response, you are limited by the output
decoupling.) Check the output response each time you
make a change as well as the switching nodes (to make sure
the response is still stable).
a.
b.
c.
V
capacitance. You will either need more capacitance or have
to make the inductor values smaller. (If you change
inductors, you will need to start the design over using the
spreadsheet and this tuning procedure.)
TRAN1
and V
Make ramp resistor larger by 25% (R
For V
frequency.
For V
(see Figure 16), there is not enough output
TRANREL
TRAN1
TRAN2
Figure 16. Transient Setting Waveform
Figure 17. Transient Setting Waveform
V
TRAN1
, increase C
, increase R
V
TRANREL
are less than the desired final droop, this
V
TRAN2
TRANREL
B
A
or increase switching
and decrease C
V
DROOP
to be larger than V
V
DROOP
TRANREL
RAMP
is larger than
A
by 25%.
).
TRAN1
by