IDT82V2082 Integrated Device Technology, Inc., IDT82V2082 Datasheet - Page 58

• Manufacturer Part Number: IDT82V2082
• Description: 2Ch T1/J1/E1 Short Haul/long Haul Liu
• Manufacturer: Integrated Device Technology, Inc.

DUAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
6
described in the IEEE 1149.1 standards.
ters plus a Test Access Port (TAP) controller. Control of the TAP is per-
formed through signals applied to the Test Mode Select (TMS) and Test
The IDT82V2082 supports the digital Boundary Scan Specification as
The boundary scan architecture consists of data and instruction regis-
IEEE STD 1149.1 JTAG TEST
ACCESS PORT
TRST
TDI
TCK
TMS
parallel latched output
Digital output pins
(Test Access Port)
Controller
TAP
IDR (Device Identification Register)
BSR (Boundary Scan Register)
Figure-21 JTAG Architecture
IR (Instruction Register)
BR (Bypass Register)
Control<6:0>
Digital input pins
58
Clock (TCK) pins. Data is shifted into the registers via the Test Data Input
(TDI) pin, and shifted out of the registers via the Test Data Output (TDO)
pin. Both TDI and TDO are clocked at a rate determined by TCK.
ister), IDR (Device Identification Register), BR (Bypass Register) and IR
(Instruction Register). These will be described in the following pages. Refer
to
Figure-21
The JTAG boundary scan registers include BSR (Boundary Scan Reg-
for architecture.
high impedance enable
Select
MUX
TEMPERATURE RANGES
INDUSTRIAL
TDO