GS1540-CQR Gennum Corporation, GS1540-CQR Datasheet - Page 7

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GS1540-CQR

Manufacturer Part Number
GS1540-CQR
Description
Hd-linx (tm) HDTV Serial Digital Non-equalizing Receiver
Manufacturer
Gennum Corporation
Datasheet
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
GENNUM CORPORATION
1, 2, 3, 4, 6, 5,
7, 8, 9, 10, 11,
12, 13, 14, 15,
16, 22, 23, 24,
25, 26, 27, 28,
29, 37, 38, 39,
40, 51, 52, 57,
58, 65, 66, 67,
68, 69, 70, 71,
77, 78, 82, 83,
84, 87, 88, 90,
92, 94, 95, 97,
99, 100, 101,
102, 103, 104,
107, 111, 114,
115, 116, 117,
118, 119, 120,
121, 122, 123,
124, 125, 126,
127, 128
17, 18
19
20
21
30, 31
32, 33
34
35
36
41, 42, 43, 44,
45, 46, 47, 48,
49, 50, 53, 54,
55, 56, 59, 60,
61, 62, 63, 64
NUMBER
DATA_OUT[19:0]
PCLK_OUT
DDO, DDO
PCLK_V
PCLK_V
DDO_V
SYMBOL
DDO_V
DDO_EN
SP_V
SP_V
NC
CC
EE
CC
EE
CC
EE
compatible
ECL/PECL
LEVEL
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
Output
Output
Output
TYPE
Input
Input
Input
Input
Input
Input
Input
No Connect . Leave these pins floating.
Digital Data Output . Differential serial outputs. 50 Ω pull up resistors are
included on chip. Note that these outputs are not cable drivers.
Ensure that the trace length between the GS1540 and the GS1508
Cable driver is kept to a minimum and that a PCB trace characteristic
impedance of 50 Ω is maintained between the GS1508 and the
GS1540. 50 Ω end termination is recommended.
Negative Supply . Most negative power supply connection for serial
data output stage.
Control Signal Input . Used to enable or disable the serial output stage.
If a loop through function is not required, then this pin should be tied
to the most positive power supply voltage.
When DDO_EN is tied to the most negative power supply voltage, the
DDO, DDO outputs are enabled.
When DDO_EN is tied to the most positive power supply voltage, the
DDO, DDO outputs are disabled.
Positive Supply . Most positive power supply connection for serial data
output stage.
Positive Supply. Most positive power supply connection for serial to
parallel converter stage.
Negative Supply . Most negative power supply connection for the
parallel output stage.
Output Clock. The device uses PCLK_OUT for clocking the output
data stream from DATA_OUT[19:0]. This clock is also used to clock
the data into the GS1500 HDTV Deformatter, or GS1510 HDTV
Deformatter.
Positive Supply. Most positive supply connection for parallel clock
output stage.
Negative Supply. Most negative power supply connection for parallel
clock output stage.
Parallel Data Output Bus. The device outputs a 20 bit parallel data
stream running at 74.25 or 74.25/1.001MHz on DATA_OUT[19:0].
DATA_OUT[19] is the MSB and DATA_OUT[0] is the LSB.
7
DESCRIPTION
522 - 27 - 02

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