CMX649 CML Microcircuits, CMX649 Datasheet - Page 10

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CMX649

Manufacturer Part Number
CMX649
Description
ADM Codec
Manufacturer
CML Microcircuits
Datasheet
ADM Codec
should be programmed to be 1/10
reconstruction. For “communications” quality, the audio bandwidth may approach 1/6
rate for ADM rates below 20kbps. The anti-alias/image SC filter bandwidth is programmed directly via C-
BUS commands to the AAF/AIF BANDWIDTH Register ($61). Additionally, the switched capacitor clock
frequency can be altered via C-BUS commands to the CLK DIVIDER CONTROL Register ($72).
Typically, the CLK DIVIDER CONTROL Register should be programmed to provide a 256kHz SC filter
clock. Altering the SC filter clock from the recommended 256kHz frequency proportionally scales the
frequency axis in the plot below:
2003 CML Microsystems Plc
-100
-120
-140
-160
-180
-20
-40
-60
-80
20
0
1,000
Figure 10a Typical Anti-Alias/Image Filter Frequency Response
th
of the ADM bit rate (or lower) for “toll” (or better) quality audio
Frequency (Hz)
10,000
10
100,000
th
of the ADM bit
B W = 14 . 0 k H z
B W = 10 . 0 k H z
B W = 7 . 0 k H z
B W = 5 . 0 k H z
B W = 3 . 7 k H z
B W = 2 . 9 k H z
CMX649
D/649/2

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