MB15C03 Fujitsu, MB15C03 Datasheet - Page 8

• Manufacturer Part Number: MB15C03
• Description: Single Serial Input PLL Frequency Synthesizer On-Chip prescaler
• Manufacturer: Fujitsu

8
MB15C03
(2) Programmable divider
The f
as f
counter, and a controller which controls the divide ratio of the prescaler.
Divide ratio range:
The MB15C03 uses the pulse swallow method; consequently, the divide rations of the swallow and programmable
counters must satisfy the relationship N > A.
The total divide ratio of the programmable divider is calculated as follows:
When N is set within 5<N<63, the possible divide ratio A of the swallow counter can take values 0<A<N-1
because N must be greater than A. For example, 0<A<19 is allowed when N = 20 but 20<A<63 is not allowed
in that case. Consequently, N>64 must be satisfied for the total divider to be set within 0<A<63.
The f
(3) Programmable reference divider
The programmable reference divider divides the reference oscillation frequency (f
connected between OSC
pin and then, sends the resultant f
counter. When the output from the external oscillator is to be input directly to OSC
be AC coupled and OSC
printed circuit board must be kept minimal or eliminated entirely; whenever possible, it must be free of any form
of load.
The following divider is used:
The f
(4) Phase comparator
The phase comparator detects the phase difference between the outputs f
an error signal that is proportional to phase difference. The outputs from the phase comparator include D
takes on one of the three states, namely, “L” (low), “H” (high), and “Z” (high impedance), and is sent to the LPF
LD which indicates the PLL lock or unlock states.
(a) Phase comparator
The phase comparator detects the phase error between f
proportional to the phase error. The roles of the f
by switching the logical input level of pin FC. This inverts the logical level of the D
of D
Table 1.)
p
. It consists of a dual modulus prescaler, a 6-bit binary swallow counter, a 12-bit binary programmable
vco
p
r
and f
and fin have the following relation:
O
Prescaler : M = 64, M + 1 = 65
Swallow counter : A = 0 to 63
Programmable counter : N = 5 to 4095
Total divide ratio = (M+1) x A + M x (N-A) = M x N + A = 64 x N + A
f
Programmable reference counter : R = 5 to 16383
f
input through fin pin is divided by the programmable divider and then output to the phase comparator
output may be selected according to the characteristics of the external LPF and the VCO. (Refer to
p
r
= f
= fin / (64 x N + A)
osc
osc
have the following relation:
/ R
IN
OUT
and OSC
pin is left open. Also, to prevent OSC
r
to the phase comparator. It consists of a 14-bit binary programmable reference
OUT
pins or from the external oscillator input taken in directly through OSC
r
and f
p
supplied to the phase comparator may be reversed
r
and f
OUT
p
, then generates an error signal that is
from malfunctioning, its traces on the
r
and f
p
from the dividers and generates
osc)
IN
O
from the crystal oscillator
pin, the connection must
output. The logical level
O
which
IN
,