P10C68 GEC Plessey Semiconductors, P10C68 Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
P10C68
Manufacturer Part Number
P10C68
Description
CMOS / SNOS NVSRAM
Manufacturer
GEC Plessey Semiconductors
Datasheet
1.P10C68.pdf
(17 pages)
www.DataSheet4U.com
P10C68/P11C68
NON-VOLATILE MEMORY OPERATION OF P10C68
NOTE
15.
STORE CYCLE 1 : W (BAR) CONTROLLED (See note 16)
8
Standard
t
t
t
t
t
WLQX
WLNH
GHNL
NLWL
ELWL
E
H
L
L
L
L
L
L
STORE INHIBIT
AUTO RECALL
MODE SELECTION
An automatic RECALL also takes place on chip power-up, starting when Vcc exceeds 3.3V, and taking t
time at which Vcc exceeds 3.3V. Vcc must not drop below 3.3V once it has exceeded it for the RECALL to function
properly.
Symbol
Alternative
5.0V
3.3V
t
STORE
t
WC
V
CC
W
H
H
H
X
L
L
L
Store cycle time
Output disable set-up to NE (bar) fall
Non-volatile set-up to write low
Write low to NE (bar) rise
Chip enable SET-UP
G
X
X
H
H
L
L
L
Parameter
NE
X
H
H
X
L
L
L
Not selected
Read RAM
Write RAM
Non-volatile recall (Note 15)
Non-volatile store
No operation
Min.
P10C68-35
45
0
0
0
Mode
Max.
10
Min.
P10C68-45
45
0
0
0
Max.
10
Standby
Active
Active
Active
I
Active
CC2
Power
Units
RECALL
ms
ns
ns
ns
ns
t
from the
Notes
17
18