CS3110 Amphion, CS3110 Datasheet - Page 2

• Manufacturer Part Number: CS3110
• Description: Reed-solomon RS Encoder (DVB)
• Manufacturer: Amphion

In digital communications systems, channel coding is used to
introduce controlled redundancy into a data sequence on the
transmission (encode) side of a communications channel. The
redundant information is then exploited by the receiver
(decoder) to overcome the effects of data corrupting channel
distortions and noise. Block codes are a type of channel coding
scheme characterized by the independent coding of successive
discrete blocks or groups of information bits with no
dependencies between successive blocks of data. Binary codes
operate on sequences of bits, whereas non-binary codes
encode data as multi-bit symbols – 8 bits per symbol for most
applications. Reed-Solomon codes are a particularly powerful
type of non-binary, linear block code.
The CS3110 and CS3112 are designed to provide high-
performance forward error correction (FEC) compliant with
digital
applications using Reed-Solomon. The cores are capable of
processing both burst and continuous data streams and input
and output will be symbol wide, clocked by a single symbol
rate clock. The implementation is low latency (2 symbol clock
Figure 2: CS3110/CS3112 Block Diagram
2
CS3110/12
Data_Valid_In
FStart_In
UP_ Dout
UP_Din
Data_In
FUNCTIONAL DESCRIPTION
video
Reset
Clk
Add
WR
RD
ERROR CORRECTION
BLOCK CODES FOR
broadcast
CS3110/CS3112
(DVB)
Codeword Generator
Codeword Length
Parity Length
Reed-Solomon Encoders
Coefficients
standards
and
Count and Control
other
Parity Symbol Calculation
cycles) and the simple core interface allows easy integration
into larger systems.
The encoder accepts an input data block and outputs the
unaltered input data block followed by parity symbols at the
end of the code block; i.e., the encoders produce systematic
codes. As shown in Figure 1, the length of the input data
stream "K" ranges between 30 and 255 symbols with the out-
put data stream "N" a function of the input stream and the
number of parity symbols "T". N ranges between 50 to 255
symbols.
The encoders consist of 3 primary blocks as shown in Figure 2.
A section of storage is reserved for the generator polynomial
coefficients, the total number of symbols in the codeword
(codeword length), and the number of appended check
symbols (parity length). The codeword length and parity
length registers are written and read via standard processor
interface signals, as are the generator polynomial coefficients,
a series of stored constants covering the range of 0 to 20
appended parity symbols. The parity symbol calculation
block is responsible for producing the parity values from the
input
coefficients. The count and control circuitry performs internal
control operations and switches the output data stream
between the input information data stream and the generated
parity values.
data
CS3110/CS3112 OPERATION
sequence
and
the
generator
Data_Valid_Out
Data_Out
FStart_Out
polynomial