MBM29LV320TE80TN Meet Spansion Inc., MBM29LV320TE80TN Datasheet - Page 37

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MBM29LV320TE80TN

Manufacturer Part Number
MBM29LV320TE80TN
Description
Flash Memory Cmos 32 M 4 M ? 8/2 M ? 16 Bit
Manufacturer
Meet Spansion Inc.
Datasheet
22. Low V
23. Write Pulse “Glitch” Protection
24. Logical Inhibit
25. Power-Up Write Inhibit
26. Sector Group Protection
To avoid initiation of a write cycle during V
than V
disabled. Under this condition the device resets to the read mode. Subsequent writes are ignored until the V
level is greater than V
prevent unintentional writes when V
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector (s) cannot be used.
Noise pulses of less than 3 ns (Typ) on OE, CE, or WE does not initiate write cycle.
Writing is inhibited by holding any one of OE = V
must be logical zero while OE is a logical one.
Power-up of the device with WE = CE = V
The internal state machine is automatically reset to the read mode on power-up.
Device user is able to protect each sector group individually to store and protect data. Protection circuit voids
both write and erase commands that are addressed to protected sectors.
Any commands to write or erase addressed to protected sector are ignore. (See “7. Sector Group Protection”
in ■FUNCTIONAL DESCRIPTION.)
LKO
CC
(Min) . If V
Write Inhibit
CC
LKO
< V
. It is the users responsibility to ensure that the control pins are logically correct to
LKO
, the command register is disabled and all internal program/erase circuits are
CC
Retired Product DS05-20894-5E_July 31, 2007
is above V
IL
CC
and OE = V
power-up and power-down, write cycle is locked out for V
LKO
IL
, CE = V
(Min) .
MBM29LV320TE/BE
IH
does not accept commands on the rising edge of WE.
IH
, or WE = V
IH
. To initiate a write cycle CE and WE
80/90/10
CC
less
CC
37

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