MBM29DL161TE-70TN Meet Spansion Inc., MBM29DL161TE-70TN Datasheet - Page 44

• Manufacturer Part Number: MBM29DL161TE-70TN
• Description: Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit Dual Operation
• Manufacturer: Meet Spansion Inc.

44
MBM29DL16XTE/BE
*1 : Successive reads from the erasing or erase-suspend sector cause DQ
*2 : Reading from the non-erase suspend sector address indicates logic “1” at the DQ
Ready/Busy
Program
Erase
Erase-Suspend Read
(Erase-Suspended Sector)
Erase-Suspend Program
operation. If it is still toggling, the device did not complete the operation successfully, and the system must write
the reset command to return to reading array data.
The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ
gone high. The system may continue to monitor the toggle bit and DQ
determining the status as described in the previous paragraph. Alternatively, it may choose to perform other
system tasks. In this case, the system must start at the begining of the algorithm when it returns to determine
the status of the operation. (Refer to “(4) Toggle Bit Algorithm” in ■FLOW CHART.)
• RY/BY
The MBM29DL16XTE/BE provide a RY/BY open-drain output pin as a way to indicate to the host system that
the Embedded Algorithms are either in progress or has been completed. If the output is low, the devices are
busy with either a program or erase operation. If the output is high, the devices are ready to accept any read/
write or erase operation. When the RY/BY pin is low, the devices will not accept any additional program or erase
commands. If the MBM29DL16XTE/BE are placed in an Erase Suspend mode, the RY/BY output will be high.
During programming, the RY/BY pin is driven low after the rising edge of the fourth write pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth write pulse. The RY/BY pin will indicate
a busy condition during the RESET pulse. Refer to “(10) RY/BY Timing Diagram during Program/Erase
Operations” and “(11) RESET, RY/BY Timing Diagram” in ■TIMING DIAGRAM for a detailed timing diagram.
The RY/BY pin is pulled high in standby mode.
Since this is an open-drain output, the pull-up resistor needs to be connected to V
be connected to the host system via more than one RY/BY pin in parallel.
• Data Protection
The MBM29DL16XTE/BE are designed to offer protection against accidental erasure or programming caused
by spurious system level signals that may exist during power transitions. During power up the devices
automatically reset the internal state machine in the Read mode. Also, with its control register architecture,
alteration of the memory contents only occurs after successful completion of specific multi-bus cycle command
sequences.
The devices also incorporate several features to prevent inadvertent write cycles resulting form V
and power-down transitions or system noise.
Mode
Retired Product DS05-20880-5E_July 13, 2007
Toggle Bit Status Table
70/90
DQ
DQ
DQ
0
1
7
7
7
Toggle
Toggle
Toggle
DQ
5
1
through successive read cycles,
2
6
to toggle.
CC
2
bit.
; multiples of devices may
Toggle*
Toggle
DQ
1*
1
CC
2
2
5
power-up
has not
1