MBM29DL161TE-70TN Meet Spansion Inc., MBM29DL161TE-70TN Datasheet - Page 38

• Manufacturer Part Number: MBM29DL161TE-70TN
• Description: Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit Dual Operation
• Manufacturer: Meet Spansion Inc.

38
MBM29DL16XTE/BE
To resume the operation of Sector Erase, the Resume command (30h) should be written to the bank being erase
suspended. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend
command can be written after the chip has resumed erasing.
• Extended Command
(1) Fast Mode
(2) Fast Programming
(3) Extended Sector Group Protection
(4) CFI (Common Flash Memory Interface)
MBM29DL16XTE/BE have Fast Mode function. This mode dispenses with the initial two unclock cycles
required in the standard program command sequence by writing Fast Mode command into the command
register. In this mode, the required bus cycle for programming is two cycles instead of four bus cycles in
standard program command. (Do not write erase command in this mode.) The read operation is also executed
after exiting this mode. To exit this mode, it is necessary to write Fast Mode Reset command into the command
register. The first cycle must contain the bank address. (Refer to “(7) Embedded Program
Fast Mode” in ■FLOW CHART.) The V
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). (Refer to
“(7) Embedded Program
In addition to normal sector group protection, the MBM29DL16XTE/BE have Extended Sector Group
Protection as extended function. This function enables to protect sector group by forcing V
and write a command sequence. Unlike conventional procedure, it is not necessary to force V
timing for control pins. The extended sector group protection requires V
condition, the operation is initiated by writing the set-up command (60h) into the command register. Then,
the sector group addresses pins (A
be set to the sector group to be protected (recommend to set V
extended sector group protection command (60h). A sector group is typically protected in 250 μs. To verify
programming of the protection circuitry, the sector group addresses pins (A
and A
a logical “1” at device output DQ
is logical “0”, please repeat to write extended sector group protection command (60h) again. To terminate
the operation, it is necessary to set RESET pin to V
Timing Diagram” in ■TIMING DIAGRAM and “(8) Extended Sector Group Protection Algorithm” in ■FLOW
CHART.)
The CFI (Common Flash Memory Interface) specification outlines device and host system software
interrogation handshake which allows specific vendor-specified software algorithms to be used for entire
families of devices. This allows device-independent, JEDEC ID-independent, and forward-and backward-
compatible software support for the specified flash device families. Refer to CFI specification in detail.
The operation is initiated by writing the query command (98h) into the command register. The bank address
should be set when writing this command. Then the device information can be read from the bank, and an
actual data of memory cell be read from the another bank. Following the command write, a read cycle from
specific address retrives device information. Please note that output data of upper byte (DQ
in word mode (16 bit) read. Refer to “Common Flash Memory Interface Code Table” in ■FLEXBLE SECTOR-
ERASE ARCHITECTURE. To terminate operation, it is necessary to write the read/reset command sequence
into the register. (See “Common Flash Memory Interface Code Table” in ■FLEXIBLE SECTOR-ERASE
ARCHITECTURE.)
12
) and (A
6
, A
1
, A
0
) = (0, 1, 0) should be set and write a command (40h). Following the command write,
TM
Algorithm for Fast Mode” in ■FLOW CHART.)
0
Retired Product DS05-20880-5E_July 13, 2007
will produce for protected sector in the read operation. If the output data
20
, A
70/90
19
CC
, A
active current is required even CE = V
18
, A
17
, A
16
IH
, A
. (Refer to “(17) Extended Sector Group Protection
15
, A
14
, A
IL
13
for the other addresses pins), and write
and A
12
ID
) and (A
on RESET pin only. With this
20
, A
19
IH
, A
6
, A
during Fast Mode.
18
1
, A
, A
17
0
) = (0, 1, 0) should
, A
TM
ID
15
on RESET pin
16
Algorithm for
ID
to DQ
, A
and control
15
, A
8
) is “0”
14
, A
13