OM6206 NXP Semiconductors, OM6206 Datasheet - Page 11
OM6206
Manufacturer Part Number
OM6206
Description
65 X 102 Pixels Matrix Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
1.OM6206.pdf
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Philips Semiconductors
Figures 9 and 10 show the serial bus protocol:
2001 Nov 14
handbook, full pagewidth
handbook, full pagewidth
When SCE is HIGH, SCLK clock signals are ignored.
During the HIGH time of SCE, the serial interface is
initialized (see Fig.11)
SDIN is sampled at the positive edge of SCLK
D/C indicates, whether the byte is a command
(D/C = LOW) or RAM data (D/C = HIGH); it is read with
the eighth SCLK pulse
65
102 pixels matrix LCD driver
SCLK
SDIN
SCE
D/C
function set (H = 1)
handbook, halfpage
DB7
Fig.9 Serial bus protocol for transmission of one byte.
function set (H = 0)
bias system
DB6
MSB (DB7)
Fig.7 General format of data stream.
Fig.8 Serial data stream, example.
DB5
data
display control
LSB (DB0)
DB4
set V OP
11
data
If SCE stays LOW after the last bit of a
command/data byte, the serial interface expects bit 7 of
the next byte at the next positive edge of SCLK (see
Fig.11)
A reset pulse with RES interrupts the transmission.
No data are written into the RAM. The registers are
cleared. If SCE is LOW after the positive edge of RES,
the serial interface is ready to receive bit 7 of a
command/data byte (see Fig.11).
DB3
temperature control
DB2
Y-address
MGT865
DB1
DB0
X-address
MGT866
Product specification
MGT867
OM6206
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