MTV038 ETC-unknow, MTV038 Datasheet - Page 18
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MTV038
Manufacturer Part Number
MTV038
Description
On-screen Display Controller For Crt/lcd Monitor
Manufacturer
ETC-unknow
Datasheet
1.MTV038.pdf
(25 pages)
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Column 6 ~ column 31 : Reserved.
3.13 Auto sizing video measurement
The auto sizing video measurement module monitors horizontal and vertical flyback pulses and their relation-
ship to video content. In horizontal measurement, the HFLB is the reference signal. As PLL clock is the certain
multiple of HFLB frequency, the measurements for HFLB and R,G,BIN are all based on the PLL clock. In ver-
tical measurement, the VFLB pulse is reference signal and the HFLB is the counting clock. HFLB and VFLB
have an exact timing relationship to the active raster display on the monitor. When the HFLB, VFLB sync sig-
nals and the R,G,BIN video signals (taken from the output of pre-amplifier) are compared, it will feedback to
MCU a lot of information about the display size and centering. If back porch is much smaller than front porch,
then the video information is too much to the left (or up in the vertical direction). If both front porth and back
porth percentage of the total display period is too large, then the display size is too small. MCU can change
the display size and center until front and back porches are equal and the porches to active video ratio is cor-
rect. Please note that due to the deviation of analog circuits, building a ratio table of correct porches to video
for different operating frequencies is needed. And it is recommend that video contrast is set to maximum first
for the correct capture of video information.
All these measurements commence at the following VFLB pulse after enabling VMEN bit, complete the meas-
urement after one vertical frame, and then FINISH bit will be set to 1 by hardware, so after FINISH bit is set
to 1 or minimum delay 2 vertical frame time after enabling VMEN bit is needed to read out the measure-
ment data. The horizontal measurement for R,G,BIN will store the minimum start location and the maximum
ending location in one vertical frame into registers. All of the input signals for timing measurement are polarity
programmable, so the different phase measurement can be obtained.
Note: (HSP, VSP) bits should be filled in the opposite value of the polarity of HFLB and VFLB input
when auto sizing function is work.
Auto sizing video measurement data bytes : read only registers
FINISH :
b3 ~ b0 : The most significant 4 bits of HSTART which represents the distance between the first active edge of
b7 ~ b0 : The least significant 8 bits of HSTART which represents the distance between the first active edge of
b3 ~ b0 : The most significant 4 bits of HEND which represents the distance between the last active edge of
Revision 1.1
Byte 0
Byte 1
Byte 2
R,G,BIN input and reference HFLB trailing edge. See Figure 10.
R,G,BIN input and reference HFLB trailing edge. See Figure 10.
R,G,BIN input and reference HFLB trailing edge. See Figure 10.
= 0 -> The auto sizing video measurement is not finished.
= 1 -> The auto sizing video measurement is finished after enabling VMEN bit.
FINISH
MYSON
TECHNOLOGY
B7
B7
B7
-
b6
b6
b6
-
-
b5
b5
b5
-
-
b4
b4
b4
-
-
HSTART
-18-
MSB
MSB
b3
b3
b3
b2
b2
b2
HSTART
HEND
b1
b1
b1
(Revision 1.1)
b0
b0
b0
LSB
MTV038
2001/8/21