TDC-GPX acam messelectronic gmbh, TDC-GPX Datasheet - Page 34

• Manufacturer Part Number: TDC-GPX
• Description: Precision Time Interval Measurement
• Manufacturer: acam messelectronic gmbh

The data can be read from address 8 for interface
FIFO1 (DStop1) and from address 9 for interface
FIFO2 (DStop2).
3.5 Reset
There are 3 ways of resetting the device:
After a Power-on reset or a Master reset it takes 40
ns before the Start and Stop inputs accept data.
After a Partial reset it takes 75 ns before the Start
and Stop inputs accept data.
3.6 MTimer
There is an internal timer available for internal use.
The main application will be setting a dedicated time
interval between 25ns and 204.7 µs after which the
interrupt flag is set. The period is set in ‘MTimer’,
register 7, in multiples of Tref. The maximum delay is
8191 * Tref = 204.7 µs. The timer can be started by
a Stop and/or Start signal. This is set in ‘MTimerStart’
and ‘MTimerStop’, register 4. Setting Bit ‘TimerFlag’,
register 12, the interrupt flag is set when the timer
stops.
0=falling edge
1=rising edge
Power-up reset: a low signal at pin PURESN
resets the whole chip.
Master-Reset: this command resets everything
except the configuration registers. It can be done
by software writing to register 4. In non-quiet
mode MasterAluTrig in register 5 can be set to
‘1’. Then this command can be done also by a
HIGH at the Alutrigger input pin. In quiet mode
MasterOenTrig in register 5 can be set to ‘1’.
Then this command can be done also by a LOW at
the OEN input pin (only with OEN off).
Partial-Reset: this command resets everything
except the configuration registers and the Inter-
face FIFOs. It can be done by software writing to
register 4. In non-quiet mode Partial-AluTrig in
register 5 can be set to ‘1’. Then this command
can be done also by a HIGH at the Alutrigger in-
put pin. In quiet mode PartialOenTrig in register 5
can be set to ‘1’. Then this command can be done
also by a LOW at the OEN input pin (only with OEN
off).
Bit22
acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de
BIN
Edge-to-Start result of the ad-
T
dressed combined channel
216
ref
2
hsdiv
refclkdiv
Bit21..0
1
2
34
3.7 Interrupt Flag
The user can select on which event(s) the interrupt
flag is set.
The selection is done in register 12, Bits 13 to 25, by
unmasking the dedicated bits. They are combined by
an Or-Gate to the interrupt flag.
Selectable events are
3.8 Error Flag
The user can select on which event(s) the error flag is
set.
The selection is done in register 11, Bits 16 to 26, by
unmasking the dedicated bits. They are combined by
an Or-Gate to the error flag.
Selectable events are
3.9 Testinputs
For test purpose a set of three TTL inputs can be mul-
tiplexed to the measuring circuit by setting Bit Gtest in
register 3. The test inputs have the same functionality
as the measure inputs, but can only handle a minimum
pulse width of 5ns and a minimum edge-to-edge dis-
tance of 20ns.
3.10 RaSpeed & Delx
The on-chip timings for measuring rising and falling
edge down to 1.5 ns are very critical. For some chips
it might be necessary to add an internal, additional
delay to guarantee correct data processing. These
delays are set by the RaSpeed bits and the Del-
Risex/DelFallx/DelTx in registers 2, 3 and 4. Increas-
ing those will reduce the pulse-pair resolution of the
TDC-GPX .
RaSpeed & Delx
Hit FIFOs 1, 2 …or/and 8 are full
Interface FIFOs 1 or/and 2 are full
PLL not locked
All Hit FIFOs empty
End of Mtimer
Hit FIFOs 1, 2 …or/and 8 are full
Interface FIFOs 1, 2 …or/and 8 are full
PLL not locked
0
1
2
3
Pulse-pair resolution
TDC-GPX
5.5 ns
6.5 ns
7.5 ns
8.5 ns