HMP8116 Intersil Corporation, HMP8116 Datasheet - Page 42

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HMP8116

Manufacturer Part Number
HMP8116
Description
Ntsc/pal Video Decoder
Manufacturer
Intersil Corporation
Datasheet
Electrical Specifications
NOTES:
Luminance Nonlinearity
SNR
GENLOCK PERFORMANCE
Horizontal Locking Time
Long-Term horizontal Sync
Lock Range
Number of Missing Horizontal
Syncs
Before Lost Lock Declared
Number of Missing Vertical Syncs
Before Lost Lock Declared
Long-Term Color Subcarrier
Lock Range
Vertical Sample Alignment
2. Guaranteed by design or characterization.
3. Test performed with C
4. This should not be confused with Clock Jitter, since the HMP8116 does not generate the sample clock. Thus, clock jitter is solely depen-
dent on the source of the CLK2 signal. The Vertical Sample Alignment parameter specifies how accurately samples align vertically from
one scan line to the next.
PARAMETER
L
= 40pF, I
V
OL
CC
SNRL
= 4mA, I
H
V
= V
SYNC LOST
SYMBOL
SYNC LOST
t
AA
LOCK
WEIGHTED
= 5.0V, T
OH
= -4mA. Input reference level is 1.5V for all inputs. V
A
= 25
NTC-7 Composite (Note 2)
Pedestal Input (Note 2)
Time from Initial Lock
Acquisition to an Error of
1 Pixel. (Note 2)
Range over specified pixel jitter
is maintained. Assumes line
time changes by amount indicat-
ed slowly between over one
field. (Note 2)
Programmable via register 04
(Note 2)
Range over color subcarrier
locking time and accuracy spec-
ifications are maintained. Sub-
carrier frequency changes by
amount indicated slowly over 24
hours. (Note 2)
(Notes 2, 4)
HMP8116
o
C (Continued)
TEST CONDITION
42
H
1 or 12
1 or 3
MIN
2
-
-
-
-
-
-
IH
1 or 12
= 3.0V, V
1 or 3
TYP
1/8
50
200
10
2
3
-
IL
= 0V.
1 or 12
1 or 3
MAX
400
5
-
-
-
-
-
Hsyncs
Vsyncs
UNITS
Fields
Pixel
dB
Hz
ns
%

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