HMP8115 Intersil Corporation, HMP8115 Datasheet - Page 38

• Manufacturer Part Number: HMP8115
• Description: Ntsc/pal Video Decoder
• Manufacturer: Intersil Corporation

Applications Information
PCB LAYOUT CONSIDERATIONS
A PCB board with a minimum of 4 layers is recommended,
with layers 1 and 4 (top and bottom) for signals and layers 2
and 3 for power and ground. The PCB layout should imple-
ment the lowest possible noise on the power and ground
planes by providing excellent decoupling.
The optimum layout places the HMP8115 as close as possi-
ble to the power supply connector and the video input con-
nector.
Component Placement
External components should be positioned as close as pos-
sible to the appropriate pin, ideally such that traces can be
connected point to point. Chip capacitors are recommended
where possible, with radial lead ceramic capacitors the sec-
ond-best choice.
Power supply decoupling should be done using a 0.1 F
ceramic capacitor in parallel with a 0.01 F chip capacitor for
each group of V
tors should be located as close to the power and ground pins
as possible, using short, wide traces.
Digital Ground Plane
All GND pins on the HMP8115 should be connected to the
digital ground plane of the board.
Analog Ground Plane
A separate analog ground plane for the HMP8115 is recom-
mended. All AGND pins on the HMP8115 should be con-
nected to the analog ground plane. This analog ground
plane should be connected to the board’s digital ground
plane at a single point.
Analog Power Plane
The HMP8115 should have its own V
isolated from the common power plane of the board, with a
gap between the two power planes of at least 1/8 inch. All
V
power plane. The analog power plane should be connected
to the board’s normal V
though a low-resistance ferrite bead, such as a Ferroxcube
5659065-3B, Fair-Rite 2743001111, or TDK BF45-4001. The
ferrite bead provides resistance to switching currents,
improving the performance of HMP8115. A single 47 F
capacitor should also be used between the analog power
plane and the ground plane to control low-frequency power
supply ripple.
If a separate linear regulator is used to provide power to the
analog power plane, the power-up sequence should be
designed to ensure latchup will not occur. A separate linear reg-
ulator is recommended if the power supply noise on the V
pins exceeds 200mV.
AA
pins on the HMP8115 must be connected to this analog
AA
and V
CC
CC
power plane at a single point
pins to ground. These capaci-
AA
power plane that is
HMP8115
AA
38
Analog Signals
Traces containing digital signals should not be routed over,
under, or adjacent to the analog output traces to minimize
crosstalk. If this is not possible, coupling can be minimized
by routing the digital signals at a 90 degree angle to the ana-
log signals. The analog input traces should also not overlay
the V
ply rejection.
EVALUATION BOARD
HMPVIDEVAL/ISA
The HMPVIDEVAL/ISA evaluation board allows connecting
the HMP8115 into a PC ISA slot for evaluation. It includes
the HMP8115 NTSC/PAL decoder, 3MB of VRAM, and a
NTSC/PAL encoder. The board accepts composite or
S-video input and displays video on a standard TV. The ISA
bus and evaluation software allow easy performance evalua-
tion of the HMP8115 using tools such as the Tektronix
VM700 video test system.
RELATED APPLICATION NOTES
Application Notes are also available on the Intersil Multime-
dia web site at http://www.semi.harris.com/mmedia.
AN9644: Composite Video Separation Techniques
AN9716: Widescreen Signalling (WSS)
AN9717: YCbCr to RGB Considerations
AN9728: BT.656 Video Interface for ICs
AN9738: Video Module Interface (VMI) for ICs
AA
power plane to maximize high-frequency power sup-