STW4811M STMicroelectronics, STW4811M Datasheet - Page 27

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STW4811M

Manufacturer Part Number
STW4811M
Description
Power Management For Multimedia Processors
Manufacturer
STMicroelectronics
Datasheet

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STw4811M/STw4811N
USB interrupt source register
Table 13.
USB interrupt source register indicates the current state of the signals that can generate an
interrupt.
USB latch register
Table 14.
USB interrupt latch register indicates which source has generated an interrupt.
Bit name
Default
Type
Bits
7
6
5
4
3
2
1
0
cr_int
Register
R
7
cr_int
bdis_acon
id_float
dn_hi
id_gnd_forced
dp_hi
sess_vld
vbus_vld
Name
bdis_acon
USB Interrupt source register (address = 08h)
USB interrupt latch registers (address = 0Ah set and 0Bh clearh)
R
6
cr_int
R/W
7
0
id_float
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R
5
bdis_
acon
R/W
6
0
Inactive
DP ball is above the carkit interrupt threshold
Inactive
Set when bdis_acon_en is set, and transceiver
asserts dp_pullup after detecting B-device
disconnect.
Inactive
ID ball floating
Inactive
DN ball is high
Inactive
ID ball grounded
Inactive
DP asserted during SRP,
Session valid comparator threshold < 2V
2 V < Session valid comparator threshold
A-device VBUS valid comparator threshold < 4.4V
A-device VBUS valid comparator threshold > 4.4V
id_float
dn_hi
R/W
R
4
5
0
dn_hi
id_gnd_
R/W
forced
4
0
R
3
Settings
id_gnd_
forced
R/W
3
0
dp_hi
R
2
dp_hi
R/W
Functional description
2
0
sess_vld
R
1
sess_
R/W
vld
1
0
vbus_vld
Default
vbus_
R/W
R
0
vld
0
0
0
0
0
0
0
0
0
0
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