SSD2119 Crystalfontz America, Inc.,, SSD2119 Datasheet - Page 32

• Manufacturer Part Number: SSD2119
• Description: 320 Rgb X 240 Tft Lcd Driver Integrated Power Circuit, Source And Gate Driver And Ram
• Manufacturer: Crystalfontz America, Inc.,

7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
Solomon Systech
The address counter (AC) assigns address to the GDDRAM. When an address set instruction is written
into the IR, the address information is sent from the IR to the AC.
After writing into the GRAM, the AC is automatically incremented by 1 (or decremented by 1). After
reading the data, the AC is not updated. A window address function allows for data to be written only to a
window area specified by GRAM.
The GDDRAM is a bit mapped static RAM holding the bit pattern to be displayed. The size of the RAM
is 320 RGB x 240 x 18 / 8 = 172,800 bytes. For mechanical flexibility, re-mapping on both Segment and
Common outputs can be selected by software. Please refer to the command “Data Output/Scan direction”
for detail description.
Four pages of display data forms a RAM address block and stored in the GDDRAM. Each block will
form the fundamental units of scrolling addresses. Various types of area scrolling can be performed by
software program according to the command “Set area Scroll” and “Set Scroll Start”.
The grayscale voltage circuit generates a LCD driver circuit that corresponds to the grayscale levels as
specified in the grayscale gamma adjustment resister. 262,144 possible colors can be displayed when 1
pixel = 18 bit. For details, see the gamma adjustment register.
These two functional blocks generate the voltage of VGH, VGL, VCOM levels and VLCD0~63 which are
necessary for operating a TFT LCD.
The timing generator generates a timing signal for the operation of internal circuit such as the internal RAM
accessing, date output timing etc.
This module is an on-chip low power RC oscillator circuitry. The oscillator generates the clock for the
DC-DC voltage converter. This clock is also used in the display timing generator.
This block is a series of latches carrying the display signal information. These latches hold the data, which
will be fed to the HV Buffer Cell and Level Selector to output the required voltage level.
SSD2119 supports RGB interface. RGB interface unit consists of D[17:0], HSYNC, VSYNC, DOTCLK
and DEN signals for display moving pictures. When the RGB interface is selected, the display operation
is synchronized with external control signals (HSYNC, VSYNC and DOTCLK). Data is written in
synchronization with the control signals when DEN is enabled for write operation in order to avoid
flicker or tearing effect while updating display data.
RGB Interface
Address Counter (AC)
Graphic Display Data RAM (GDDRAM)
Gamma/Grayscale Voltage Generator
Booster and Regulator Circuit
Timing Generator
Oscillation Circuit (OSC)
Data Latches
Jun 2009 P 32/95
Rev 1.4
SSD2119