CY23S08 Cypress Semiconductor Corporation., CY23S08 Datasheet - Page 2

• Manufacturer Part Number: CY23S08
• Description: 3.3v Zero Delay Buffer
• Manufacturer: Cypress Semiconductor Corporation.

Pinouts
Table 1. Pin Definition - 16 Pin SOIC Package
Document #: 38-07265 Rev. *G
Notes
1. Output phase is indeterminant (0° or 180° from input clock). If phase integrity is required, use the CY23S08–2.
2. Weak pull down.
3. Weak pull down on all outputs.
4. Weak pull ups on these inputs.
Pin
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
REF
CLKA1
CLKA2
V
GND
CLKB1
CLKB2
S2
S1
CLKB3
CLKB4
GND
V
CLKA3
CLKA4
FBK
DD
DD
[4]
[4]
[2]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
Signal
Input reference frequency, 5V tolerant input
Clock output, Bank A
Clock output, Bank A
3.3V supply
Ground
Clock output, Bank B
Clock output, Bank B
Select input, bit 2
Select input, bit 1
Clock output, Bank B
Clock output, Bank B
Ground
3.3V supply
Clock output, Bank A
Clock output, Bank A
PLL feedback input
Figure 1. Pin Diagram - 16 Pin SOIC Package
CLKA1
CLKA2
CLKB1
CLKB2
GND
REF
V
S2
DD
1
2
3
4
5
6
7
8
Top View
SOIC
15
14
13
12
11
10
16
9
FBK
CLKA4
CLKA3
V
GND
CLKB4
CLKB3
S1
DD
Description
CY23S08
Page 2 of 10
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