RF31 Hope Microelectronics co., Ltd, RF31 Datasheet - Page 75

• Manufacturer Part Number: RF31
• Description: Rf31 Ism Receiver
• Manufacturer: Hope Microelectronics co., Ltd

Register 08h. Operating Mode and Function Control 2
Reset value = 00000001
Name
Type
Bit
7:5
Bit
4
3
2
1
0
Tel: [phone]
D7
antdiv[2:0]
Reserved
Reserved
Name
rxmpk
enldm
ffclrrx
antdiv[2:0]
D6
R/
w
Enable Antenna Diversity.
The GPIO must be configured for Antenna Diversity for the algorithm to work properly.
RX Multi Packet.
When the chip is selected to use FIFO Mode (dtmod[1:0]) and RX Packet
Handling (enpacrx) then it will fill up the FIFO with multiple valid packets if this
bit is set, otherwise the receiver will automatically leave the RX State after the
first valid packet has been received.
Reserved.
Enable Low Duty Cycle Mode.
If this bit is set to 1 then the chip turns on the RX regularly. The frequency
should be set in the Wake-Up Timer Period register, while the minimum ON
time should be set in the Low-Duty Cycle Mode Duration register. The FIFO
mode should be enabled also.
RX FIFO Reset/Clear.
This has to be a two writes operation: Setting ffclrrx =1 followed by ffclrrx = 0
will clear the contents of the RX FIFO.
Reserved.
100:
101:
110:
111:
000:
001:
010:
011:
Fax: [phone]
D5
RX state
GPIO Ant1
ant. div. algorithm in beacon mode
ant. div. algorithm in beacon mode
antenna diversity algorithm
antenna diversity algorithm
0
1
0
1
rxmpk
D4
R/
w
E-mail: [e-mail]
Reserved
Function
D3
R/
non RX state
w
GPIO Ant2
0
1
0
1
1
0
0
1
enldm
R/
D2
w
http://www.hoperf.com
GPIO Ant1 GPIO Ant2
ffclrrx
R/
D1
R F 3 1
0
1
0
1
w
0
0
1
1
Reserved
R/
D0
w
0
0
1
1
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