RF31 Hope Microelectronics co., Ltd, RF31 Datasheet - Page 68

• Manufacturer Part Number: RF31
• Description: Rf31 Ism Receiver
• Manufacturer: Hope Microelectronics co., Ltd

Register 03h. Interrupt/Status 1
Reset value = xxxxxxxx
When any of the Interrupt/Status 1 bits change state from 0 to 1 the device will notify the microcontroller by setting
the nIRQ pin LOW if it is enabled in the Interrupt Enable 1 register. The nIRQ pin will go to HIGH and all the
enabled interrupt bits will be cleared when the microcontroller reads this address. If any of these bits is not enabled
in the Interrupt Enable 1 register then it becomes a status signal that can be read anytime in the same location and
will not be cleared by reading the register.
Name
Type
Bit
6:5
Bit
7
4
3
2
1
0
Tel: [phone]
ifferr
D7
Reserved
Reserved
R
irxffafull
ipkvalid
icrerror
Name
ifferr
iext
Reserved
D6
R
FIFO Underflow/Overflow Error.
When set to 1 the TX FIFO has overflowed or underflowed.
Reserved.
RX FIFO Almost Full.When set to 1 the RX FIFO has met its almost full
threshold and needs to be read by the microcontroller.
External Interrupt.
When set to 1 an interrupt occurred on one of the GPIO‘s if it is programmed
so. The status can be checked in register 0Eh. See GPIOx Configuration
section for the details.
Reserved.
Valid Packet Received. When set to 1 a valid packet has been received.
CRC Error.
When set to 1 the cyclic redundancy check is failed.
Fax: [phone]
Reserved
D5
R
irxffafull
D4
R
E-mail: [e-mail]
iext
Function
D3
R
Reserved
D2
R
http://www.hoperf.com
ipkvalid
D1
R
R F 3 1
icrerror
D0
R
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