MC56F8346 Freescale Semiconductor, Inc, MC56F8346 Datasheet - Page 5

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MC56F8346

Manufacturer Part Number
MC56F8346
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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56F8346/56F8146 General Description
Note: Features in italics are NOT available in the 56F8146 device.
Freescale Semiconductor
Preliminary
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
• Access up to 1MB of off-chip program and data memory
• Chip Select Logic for glueless interface to ROM and
• 128KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 8KB of Data RAM
• 8KB of Boot Flash
• Up to two 6-channel PWM Modules
• Four 4-channel, 12-bit ADCs
C-efficient architecture
SRAM
3
3
4
4
4
5
4
4
3
4
4
2
2
6
6
VREF
PWM Outputs
Current Sense Inputs
or GPIOC
Fault Inputs
PWM Outputs
Current Sense Inputs
or GPIOD
Fault Inputs
AD0
AD1
Temp_Sense
AD0
AD1
Decoder 0 or
Decoder 1 or
Quadrature
Quadrature
Timer D or
Timer A or
Timer B or
Timer C or
FlexCAN
GPIOC
SPI1 or
GPIOC
GPIOE
GPIOE
Quad
Quad
Quad
Quad
ADCA
ADCB
Decoding
Peripherals
Program Memory
64K x 16 Flash
4K x 16 Flash
Data Memory
8K x 16 RAM
2K x 16 RAM
4K x 16 Boot
SPI0 or
GPIOE
Memory
56F8346/56F8146 Block Diagram - 144 LQFP
Flash
4
PWMA
PWMB
SCI1 or
GPIOD
2
RSTO
Hardware Looping Unit
Device Selects
Program Controller
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
Peripheral
RESET
SCI0 or
GPIOE
56F8346 Technical Data, Rev. 15
EMI_MODE
and
2
EXTBOOT
PAB
PDB
CDBR
CDBW
Watchdog
IPBus Bridge (IPBB)
COP/
RW
Control
EOnCE
Generation Unit
JTAG/
Port
Address
5
IRQA IRQB
Controller
Interrupt
IPAB
V
2
PP
56800E Core
IPWDB
V
16-Bit
4
Three 16-bit Input Registers
CAP
16 x 16 + 36 -> 36-Bit MAC
System Bus
Four 36-bit Accumulators
• Temperature Sensor
• Up to two Quadrature Decoders
• Optional On-Chip Regulator
• FlexCAN module
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
• Up to 62 GPIO lines
• 144-pin LQFP Package
unobtrusive, real-time debugging
7
Integration
V
Control
System
Digital Reg
Data ALU
OCR_DIS
Module
DD
IPRDB
CLKO
resets
5
Clock
Low Voltage
R/W Control
V
Supervisor
SS
O
R
P
V
2
DDA
Analog Reg
CLKMODE
Generator
Clock
Manipulation
External Data
PLL
Address Bus
Bus Control
Bus Switch
V
Unit
Bit
External
SSA
Switch
O
S
C
XTAL
EXTAL
6
2
8
7
9
2
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
A8-15 or GPIOA0-7
GPIOB0 or A16
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
RD
GPIOD0-1 or CS2-3
PS (CS0) or GPIOD8
DS (CS1) or GPIOD9
5

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