MC56F8346 Freescale Semiconductor, Inc, MC56F8346 Datasheet - Page 150

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MC56F8346

Manufacturer Part Number
MC56F8346
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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10.9 Reset, Stop, Wait, Mode Select, and Interrupt Timing
150
3. Substitute BMDAR for MDAR if there is no chip select
4. MDAR is active in this calculation only when the chip select changes.
1. In the formulas, T = clock cycle. For an operating frequency of 60MHz, T = 16.67ns. At 8MHz (used during Reset and Stop
2. Parameters listed are guaranteed by design.
3. During Power-On Reset, it is possible to use the device’s internal reset stretching circuitry to extend this period to 2
4. The minimum is specified for the duration of an edge-sensitive IRQA interrupt required to recover from the Stop state. This is
5. The interrupt instruction fetch is visible on the pins only in Mode 3.
RESET Assertion to Address, Data and Control Signals
High Impedance
Minimum RESET Assertion Duration
RESET Deassertion to First External Address Output
Edge-sensitive Interrupt Request Width
IRQA, IRQB Assertion to External Data Memory Access
Out Valid, caused by first instruction execution in the
interrupt service routine
IRQA, IRQB Assertion to General Purpose Output Valid,
caused by first instruction execution in the interrupt
service routine
Delay from IRQA Assertion (exiting Wait) to External Data
Memory access
Delay from IRQA Assertion to External Data Memory
Access (exiting Stop)
IRQA Width Assertion to Recover from Stop State
modes), T = 125ns.
not the minimum required so that the IRQA interrupt is accepted.
Table 10-17 Reset, Stop, Wait, Mode Select, and Interrupt Timing
4
Characteristic
56F8346 Technical Data, Rev. 15
5
3
t
IDM - FAST
t
t
t
Symbol
IRI - FAST
IG - FAST
IF - FAST
t
t
t
t
RAZ
t
RDA
IRW
IDM
t
t
t
t
RA
IRI
IW
IG
IF
Typical
1.5T
1.5T
Min
16T
63T
18T
14T
18T
14T
22T
18T
22T
18T
Typical
Max
64T
21
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
1,2
See Figure
21
T.
10-5
10-5
10-5
10-6
10-7
10-7
10-8
10-9
10-9
Preliminary

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