MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 6

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MC56F836

Manufacturer Part Number
MC56F836
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1.1.3
Note: Features in italics are NOT available in the 56F8165 device.
1.1.4
Note: Features in italics are NOT available in the 56F8165 device.
6
Harvard architecture permits as many as three simultaneous accesses to program and data memory
Flash security protection feature
On-chip memory, including a low-cost, high-volume Flash solution
— 512KB of Program Flash
— 4KB of Program RAM
— 32KB of Data Flash
— 32KB of Data RAM
— 32KB of Boot Flash
EEPROM emulation capability
Pulse Width Modulator module:
— In the 56F8365, two Pulse Width Modulator modules, each with six PWM outputs, three Current Sense
— In the 56F8165, one Pulse Width Modulator module with six PWM outputs, three Current Sense inputs
Four 12-bit, Analog-to-Digital Converters (ADCs), which support four simultaneous conversions with
quad, 4-pin multiplexed inputs; ADC and PWM modules can be synchronized through Timer C, channels
2 and 3
Quadrature Decoder:
— In the 56F8365, two four-input Quadrature Decoders or two additional Quad Timers
— In the 56F8165, one four-input Quadrature Decoder, which works in conjunction with Quad Timer A
Temperature Sensor can be connected, on the board, to any of the ADC inputs to monitor the on-chip
temperature
Quad Timer:
— In the 56F8365, four dedicated general-purpose Quad Timers totaling six dedicated pins: Timer C with
— In the 56F8165, two Quad Timers; Timer A and Timer C both work in conjunction with GPIO
Optional On-Chip Regulator
Up to two FlexCAN (CAN Version 2.0 B-compliant) modules with 2-pin port for transmit and receive
Two Serial Communication Interfaces (SCIs), each with two pins (or four additional GPIO lines)
Up to two Serial Peripheral Interfaces (SPIs), both with configurable 4-pin port (or eight additional GPIO
lines); SPI1 can also be used as Quadrature Decoder 1 or Quad Timer B
Computer Operating Properly (COP)/Watchdog timer
Memory
Peripheral Circuits
inputs, and four Fault inputs; fault-tolerant design with dead time insertion; supports both center-aligned
and edge-aligned modes
and three Fault inputs; fault-tolerant design with dead time insertion; supports both center-aligned and
edge-aligned modes
two pins and Timer D with four pins
56F8365 Technical Data, Rev. 7
Freescale Semiconductor
Preliminary

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