MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 127

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MC56F836

Manufacturer Part Number
MC56F836
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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6.5.10.1
This field represents the upper two address bits of the “hard coded” I/O short address.
6.5.10.2
This field represents the lower 16 address bits of the “hard coded” I/O short address.
6.5.11
The Peripheral Clock Enable Register 2 is used to enable or disable clocks to the peripherals as a
power-saving feaure. The clocks can be individually controller for each peripheral on the chip.
6.5.11.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.11.2
Each bit controls clocks to the indicated peripheral.
Freescale Semiconductor
Preliminary
Base + $D
Base + $E
Base + $D
RESET
RESET
RESET
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
Read
Write
Read
Write
Read
Write
Peripheral Clock Enable Register 2 (SIM_PCE2)
Input/Output Short Address Low (ISAL[23:22])—Bit 1–0
Input/Output Short Address Low (ISAL[21:6])—Bit 15–0
Reserved—Bits 15–1
CAN2 Enable—Bit 0
Figure 6-15 I/O Short Address Location High Register (SIM_ISALH)
Figure 6-16 I/O Short Address Location Low Register (SIM_ISAL)
15
15
15
1
1
1
0
0
14
14
14
1
1
1
0
0
13
13
13
1
1
1
0
0
12
12
12
1
1
1
0
0
11
11
11
56F8365 Technical Data, Rev. 7
1
1
1
0
0
10
10
10
1
1
1
0
0
9
1
1
9
1
9
0
0
8
8
8
1
1
1
0
0
ISAL[21:6]
7
7
7
1
1
1
0
0
6
6
6
1
1
1
0
0
5
5
5
1
1
1
0
0
4
4
4
1
1
1
0
0
3
3
3
1
1
1
0
0
2
2
2
1
1
1
0
0
Register Descriptions
ISAL[23:22]
1
1
1
1
1
0
0
CAN
0
0
0
1
1
2
1
127

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