EVX8AQ160TPY ETC-unknow, EVX8AQ160TPY Datasheet - Page 75
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EVX8AQ160TPY
Manufacturer Part Number
EVX8AQ160TPY
Description
Adc Quad 1.25gsps 8-bit Lvds 380-pin Ebga
Manufacturer
ETC-unknow
Datasheet
1.EVX8AQ160TPY.pdf
(82 pages)
- Current page: 75 of 82
- Download datasheet (4Mb)
11.4
11.5
e2v semiconductors SAS 2009
Digital Outputs
Reset Buffer (SYNCP, SYNCN)
The digital outputs are LVDS compatible. They have to be 100Ω differentially terminated.
Figure 11-6. Differential Digital Outputs Terminations (100Ω LVDS)
Figure 11-7. Reset Buffer (SYNCP, SYNCN)
Note:
Differential LVDS Buffers
QUAD ADC Output Data
We recommend to drive the SYNC, SYNCN signal using an LVDS buffer.
LVDS Buffer
Differential Output
Data Out
Data OutN
/Data Out
Data Out
buffers
Z0 = 50Ω
Z0 = 50Ω
Z0 = 50 Ω
Z0 = 50
Ω
SYNCP
SYNCN
15.04 KΩ
100 Termination
8.64 KΩ
Ω
50Ω
50Ω
VCC = 3.3V
ADC Reset Buffer
GND
0846G–BDC–11/09
GND
To Load
EV8AQ160
5.25 pF
75
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