MT8VDDT12832UY-6 Micron Semiconductor Products, MT8VDDT12832UY-6 Datasheet - Page 14

• Manufacturer Part Number: MT8VDDT12832UY-6
• Description: 128mb, 256mb, 512mb X32, Dr 100-pin Ddr Udimm
• Manufacturer: Micron Semiconductor Products

Figure 5:
Operating Mode
Extended Mode Register
pdf: 09005aef80745603, source: 09005aef807455eb
DD8C32_64_128x32UG_2.fm - Rev. G 5/05 EN
CAS Latency Diagram
The normal operating mode is selected by issuing a MODE REGISTER SET command
with bits A7–A11 (128MB, 256MB), or A7–A12 (512MB) each set to zero, and bits A0–A6
set to the desired values. A DLL reset is initiated by issuing a MODE REGISTER SET com-
mand with bits A7 and A9–A11 (128MB, 256MB), or A7 and A9–A12 (512MB) each set to
zero, bit A8 set to one, and bits A0–A6 set to the desired values. Although not required by
the Micron device, JEDEC specifications recommend when a LOAD MODE REGISTER
command is issued to reset the DLL, it should always be followed by a LOAD MODE
REGISTER command to select normal operating mode.
All other combinations of values for A7–A11 (128MB, 256MB), or A7–A12 (512MB) are
reserved for future use and/or test modes. Test modes and reserved states should not be
used because unknown operation or incompatibility with future versions may result.
The extended mode register controls functions beyond those controlled by the mode
register; these additional functions are DLL enable/disable and output drive strength.
These functions are controlled via the bits shown in Figure 6, Extended Mode Register
Definition Diagram. The extended mode register is programmed via the LOAD MODE
REGISTER command to the mode register (with BA0 = 1 and BA1 = 0) and will retain the
stored information until it is programmed again or the device loses power. The enabling
of the DLL should always be followed by a LOAD MODE REGISTER command to the
mode register (BA0/BA1 both LOW) to reset the DLL.
COMMAND
COMMAND
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
READ
READ
Burst Length = 4 in the cases shown
Shown with nominal t AC, t DQSCK, and t DQSQ
T0
T0
128MB, 256MB, 512MB: (x32, DR) 100-Pin DDR UDIMM
CL = 2
TRANSITIONING DATA
CL = 2.5
14
NOP
NOP
T1
T1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
NOP
NOP
T2
T2n
T2n
DON’T CARE
Extended Mode Register
T3
NOP
NOP
T3
©2004, 2005 Micron Technology, Inc. All rights reserved.
T3n
T3n