XC3S502 Xilinx Corp., XC3S502 Datasheet - Page 124

• Manufacturer Part Number: XC3S502
• Description: Spartan-3 Fpga Family Complete Data Sheet
• Manufacturer: Xilinx Corp.

Spartan-3 FPGA Family: Pinout Descriptions
Table 86: VQ100 Package Pinout
Table 87: User I/Os Per Bank in VQ100 Package
124
Package Edge
Bank
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
7
7
7
Bottom
Right
Top
Left
IO_L40N_7/VREF_7
IO_L40P_7
VCCO_7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
Pin Name
XC3S200
XC3S50
I/O Bank
0
1
2
3
4
5
6
7
Maximum
VQ100 Pin
Number
I/O
10
6
7
8
8
8
8
8
P12
P11
P10
P20
P29
P41
P56
P66
P73
P82
P95
P33
P58
P84
P18
P45
P6
P3
P7
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCO
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I/O
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I/O
1
2
5
5
0
0
4
5
Table 86: VQ100 Package Pinout
User I/Os by Bank
Table 87
tributed between the eight I/O banks on the VQ100 pack-
age.
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
DUAL
Bank
N/A
N/A
0
0
0
0
6
6
0
0
All Possible I/O Pins by Type
indicates how the available user-I/O pins are dis-
VCCINT
VCCINT
CCLK
DONE
HSWAP_EN
M0
M1
M2
PROG_B
TCK
TDI
TDO
TMS
DCI
2
2
2
2
2
0
2
2
Pin Name
XC3S200
XC3S50
VREF
DS099-4 (v2.2) May 25, 2007
1
1
1
1
0
0
2
1
VQ100 Pin
Product Specification
Number
P100
P69
P93
P52
P51
P98
P25
P24
P26
P99
P77
P76
P78
GCLK
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
VCCINT
VCCINT
2
2
0
0
2
2
0
0
JTAG
JTAG
JTAG
JTAG
Type
R