PIC16C770 Microchip Technology Inc., PIC16C770 Datasheet - Page 48

• Manufacturer Part Number: PIC16C770
• Description: 18/20-pin, 8-bit Cmos Microcontrollers With 10/12-bit A/d
• Manufacturer: Microchip Technology Inc.

PIC16C717/770/771
5.2.1
The prescaler assignment is fully under software con-
trol (i.e., it can be changed “on-the-fly” during program
execution).
FIGURE 5-2:
TABLE 5-1:
DS41120B-page 46
Address
01h,101h
0Bh,8Bh,
10Bh,18Bh
81h,181h
85h
Legend: x = unknown, u = unchanged, - = unimplemented locations read as ’0’. Shaded cells are not used by Timer0.
Note:
RA4/T0CKI
CLKOUT (= Fosc/4)
WDT Enable Bit
Watchdog
Note: T0CS, T0SE, PSA, PS<2:0> are (OPTION_REG<5:0>).
Pin
Timer
To avoid an unintended device RESET, a
specific instruction sequence (shown in the
PICmicro™ Mid-Range Reference Man-
ual, DS33023) must be executed when
changing the prescaler assignment from
Timer0 to the WDT. This sequence must
be followed even if the WDT is disabled.
SWITCHING PRESCALER
ASSIGNMENT
Name
TMR0
INTCON
OPTION_REG
TRISA
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
REGISTERS ASSOCIATED WITH TIMER0
T0SE
0
1
Timer0 register
PORTA Data Direction Register
RBPU INTEDG T0CS
Bit 7
GIE
PSA
M
U
X
0
1
PEIE
Bit 6
T0CS
M
U
X
Bit 5
T0IE
0
8-bit Prescaler
8 - to - 1MUX
Time-out
8
M U X
WDT
T0SE
INTE
Bit 4
1
0
1
PSA
M
U
X
RBIE
Bit 3
PSA
5.3
The TMR0 interrupt is generated when the TMR0 reg-
ister overflows from FFh to 00h. This overflow sets bit
T0IF (INTCON<2>). The interrupt can be masked by
clearing bit T0IE (INTCON<5>). Bit T0IF must be
cleared in software by the Timer0 module interrupt ser-
vice routine before re-enabling this interrupt. The
TMR0 interrupt cannot awaken the processor from
SLEEP since the timer is shut off during SLEEP.
PSA
Bit 2
T0IF
PS2
PS<2:0>
Timer0 Interrupt
Cycles
SYNC
2
Bit 1
INTF
PS1
RBIF
Bit 0
PS0
2002 Microchip Technology Inc.
TMR0 reg
Data Bus
xxxx xxxx
0000 000x
1111 1111
1111 1111
Value on:
POR,
BOR
8
Set flag bit T0IF
on Overflow
Value on all
uuuu uuuu
0000 000u
1111 1111
1111 1111
RESETS
other