WM8608 ETC-unknow, WM8608 Datasheet - Page 8

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WM8608

Manufacturer Part Number
WM8608
Description
The Wm8608 Comprises A High Performance Multi-channel Pwm Digital Power Amplifier Controller. Simply By Adding Appropriate Power Output Stages A Multi-channel Power Amplifier May Be Built. Six Identical Full Audio Bandwidth Channels, Plus A Reduced B
Manufacturer
ETC-unknow
Datasheet
WM8608
Notes:
1.
2.
3.
4.
Note: A third order differential RC filter has been used
TERMINOLOGY
1.
2.
3.
POWER CONSUMPTION
Table 1 Supply Current Consumption
Notes:
1.
2.
w
AVDD, DVDD, BVDD = 3.3V
OFF
Standby
Mute
Stereo
5.1
6.1
7.1
Test Conditions
AVDD, BVDD, DVDD = 2.7 to 3.3V, AGND, DGND, BGND = 0V, T
stated.
PARAMETER
PWM buffer drive strength
PWM pulse repetition rate
PARAMETER
Filter
Stopband
with no signal applied.
Normally a THD+N measurement at 60dB below full scale. The measured signal is then corrected by adding the 60dB
to it (e.g. THD+N @ -60dB= -32dB, DR= 92dB).
Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured ‘A’
weighted over a 20Hz to 20kHz bandwidth.
All performance measurements done with 20kHz AES17 low pass filter, except where noted an A-weight filter is used.
Failure to use such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in
the Electrical Characteristics. The low pass filter removes out of band noise; although it is not audible it may affect
dynamic specification values.
Parameter guaranteed by design.
Validated using the following filter
Signal-to-noise ratio (dB) - SNR is a measure of the difference in level between the full scale output and the output
Dynamic range (dB) - DNR is a measure of the difference between the highest and lowest portions of a signal.
THD+N (dB) - THD+N is a ratio, of the RMS values, of (Noise + Distortion)/Signal.
T
All figures are kHz 1kHz input sine wave @ 0dB.
A
MODE DESCRIPTION
= +25
o
C, Slave Mode, fs = 48kHz, MCLK = 27 kHz, 24-bit data
SYMBOL
SYMBOL
I
0.02
1.76
1.76
1.76
1.76
1.72
AVDD
I
TYPICAL SUPPLY CURRENTS
0
f
source
I
PWM
sink
I
0.28
27.2
27.7
28.1
29.6
29.9
DVDD
0
TEST CONDITIONS
TEST CONDITIONS
[mA]
fs = 44.1kHz
fs = 48kHz
20pF load
CMOS
7.55
7.55
7.55
7.55
7.55
CMOS
-3dB
0
0
I
BVDD
A
LVDS
= -20 to +85
29.0
29.0
29.0
29.0
29.0
0
0
CMOS
TOTAL CURRENT
MIN
MIN
25
25
0.30
36.5
37.0
37.5
38.9
39.2
o
0
C, fs = 44.1kHz/48kHz, MCLK = 256fs unless
4
4
[mA]
LVDS
0.30
58.0
58.5
58.9
60.3
60.6
352.8
1.00
0
TYP
384
TYP
CMOS
TOTAL POWER
0.99
121
122
124
128
129
0
PP Rev 1.5 March 2004
MAX
MAX
[mW]
LVDS
0.99
191
193
194
199
200
Product Preview
0
UNIT
UNIT
kHz
kHz
kHz
mA
mA
8

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