WM8608 ETC-unknow, WM8608 Datasheet - Page 16

• Manufacturer Part Number: WM8608
• Description: The Wm8608 Comprises A High Performance Multi-channel Pwm Digital Power Amplifier Controller. Simply By Adding Appropriate Power Output Stages A Multi-channel Power Amplifier May Be Built. Six Identical Full Audio Bandwidth Channels, Plus A Reduced B
• Manufacturer: ETC-unknow

WM8608
DIGITAL AUDIO INTERFACE
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Table 9 Signal Path Group Delay
Key: FL = Front-Left, FR = Front-Right, FC = Front-Centre, SL = Surround-Left, SR = Surround-Right,
RL = Surround-Left, RR = Surround-Right, RC = Surround-Centre, SUB = Subwoofer
Note: The shorter delay on the SUB channel will not significantly affect audio performance. (It is
equivalent to moving the subwoofer forwards by about 15cm.)
The digital audio interface is used for inputting audio data into the WM8608. It uses five pins:
The clock signals BCLK and LRCLK can be outputs when the WM8608 operates as a master, or
inputs when it is a slave (see Master and Salve Mode Operation, below).
MASTER AND SLAVE MODE OPERATION
The WM8608 can be configured as either a master or slave mode device. As a master device the
WM8608 generates BCLK and LRCLK and thus controls sequencing of the data transfer on the data
channels. In slave mode, the WM8608 receives data and clock signals over the digital audio
interface. The mode can be selected by writing to the MS bit (see Table 23). Master and slave modes
are illustrated below.
Figure 8 Operation Mode
AUDIO DATA FORMATS
In Left Justified mode, the MSB is available on the first rising edge of BCLK following a LRCLK Audio
data is applied to the internal filters via the Digital Audio Interface. 5 popular interface formats are
supported:
All 5 formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits. Except that 32
bit data is not supported in right justified mode. DINFRONT, DINSRND, DINC_LFE, DINREAR and
LRCLK are sampled on the rising, or falling edge of BCLK.
In left justified, right justified and I
DINFRONT, DINSRND, DINC_LFE and DINREAR inputs. Audio Data for each stereo channel is time
Parameter
FL/FR/FC/SL/SR/RC channel
SUB channel
DECODER
DINFRONT: Front L+R channel data input
DINSRND: Surround L+R channel data input
DINC_LFE: Front Centre (L) and LFE (R) channel data input
DINREAR: Rear L+R channel data input
LRCLK: Data alignment clock
BCLK: Bit clock, for synchronisation
Left Justified mode
Right Justified mode
I
DSP mode A
DSP mode B
2
DSP
S mode
Master Mode
BCLK
LRCLK
DINFRONT
DINSRND
DINC_LFE
DINREAR
Contoller
WM8608
PWM
2
S modes the digital audio interface receives data on the
Group Delay
47
22
DECODER
samples
samples
DSP
Unit
Slave Mode
fs=48kHz
PP Rev 1.5 March 2004
1.0
0.5
BCLK
LRCLK
DINFRONT
DINSRND
DINC_LFE
DINREAR
Product Preview
Contoller
WM8608
PWM
Unit
ms
ms
16