TMC428 ETC-unknow, TMC428 Datasheet - Page 35

• Manufacturer Part Number: TMC428
• Description: Intelligent Triple Stepper Motor Controller With Serial Peripheral Interfaces
• Manufacturer: ETC-unknow

TMC428 DATA SHEET (V. 1.00 / February 12, 2001)
Initialization of the Micro Step Look-Up-Table
The TMC428 provides a look-up-table (LUT) of 64 values of 6 bit for micro stepping. The micro step LUT
can be adapted by storing an arbitrary quarter period of a periodic function to individual stepper motor
characteristics. It is common to uses one period of a sine wave function for micro stepping. With that
function, the current of one phase is controlled with the sine function where the other phase is controlled
with the cosine function.
To initialize the LUT for micro stepping one simply has to load a quarter sine wave period into the micro
step LUT within the on-chip RAM area. Two successive values of the sine wave function are included in
one datagram similar to the primary signal code words for the stepper motor driver chain configuration.
The TMC428 automatically expands the quarter sine wave period to a full sine and cosine function. The
necessary data values y(i) to represent a ¼ sine wave period for the micro step LUT are defined by
where the conditional replacement y(i) := 63 for y(i) > 63 has to be done. With this, one gets the
following 64 values y(i) = { 0, 2, 3, 5, 6, 8, 9, 11, 12, 14, 16, 17, 19, 20, 22, 23, 24, 26, 27, 29, 30, 32,
33, 34, 36, 37, 38, 39, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 56, 57, 58, 59, 59,
60, 60, 61, 61, 62, 62, 62, 63, 63, 63, 64, 64, 64, 64, 64 }.
Table 18 - scheme of ¼ sine wave period with 6 bit resolution and 64 ( 32 x 2 ) values
Copyright © 2000, TRINAMIC Microchips GmbH
TRINAMIC
M I C R O C H I P S
3
1
1
3
0
1
2
9
0
0
0
0
0
1
1
1
1
1
ADDRESS
y(i) = int[ ½ + 64 * sin(¼ * 2 *
2
8
0
0
0
0
1
1
1
1
1
0
2
7
0
0
0
1
0
1
1
1
1
0
2
6
0
1
1
0
1
0
0
1
1
0
32 bit DATAGRAM send from a µC to the TMC428 via pin SDI_C
2
5
1
0
1
0
1
0
1
0
1
0
2
4
0
2
3
2
2
2
1
2
0
1
9
* i / 64) ]
1
8
1
7
1
6
1
5
(x)
11
14
62
63
63
63
63
2
5
8
10
1
4
with
1
3
0
0
0
0
0
1
1
1
1
1
RAM addresses
DATA
data @ odd
1
2
0
0
0
0
0
1
1
1
1
1
i = { 0, 1, 2, 3, ..., 60, 61, 62, 63 },
1
1
0
0
1
1
1
1
1
1
1
1
1
0
0
1
0
0
1
1
1
1
1
1
9 8 7 6 5 4 3 2 1 0
1
0
0
1
1
1
1
1
1
1
0
1
0
1
0
0
1
1
1
1
(x)
12
62
63
63
63
63
0
3
6
9
10
0
0
0
0
0
1
1
1
1
1
RAM addresses
data @ even
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
0
0
1
0
1
1
1
1
1
1
0
1
1
0
0
1
1
1
1
1
35
35
0
1
0
1
0
0
1
1
1
1