TMC428 ETC-unknow, TMC428 Datasheet - Page 23

• Manufacturer Part Number: TMC428
• Description: Intelligent Triple Stepper Motor Controller With Serial Peripheral Interfaces
• Manufacturer: ETC-unknow

TMC428 DATA SHEET (V. 1.00 / February 12, 2001)
where f_clk[Hz] is the frequency of the external clock signal. The parameter velocity is in range 0 to 2047.
The pulse generator of the TMC428 generates one step pulse with each pulse generator clock pulse if the
velocity is set to 2047. The change R in the pulse rate per time unit (step frequency change per second –
the acceleration) is given by
The parameter a_max is in range 0 to 2047. So, the parameter ramp_div scales the acceleration
parameter a_max, where the parameter pulse_div scales the velocity parameters.
Table 10 – micro step resolution selection (usrs) parameter
The three bit wide parameter usrs (µ step resolution selection) determines the micro step resolution for its
associated stepper motor according to Table 10. There is a individual set of 6 DAC bits proposed for each
of the two phases (coils) for current control to provide up to 64 micro steps per full step. Depending on
the micro step resolution, a sub set of 6 DAC bits are significant. Using full stepping, the current amplitude
is constant for both phases (coils) of a stepper motor and the polarity of one phase (coil) changes with
each full step. The micro step counters are initialized by 0 during power-on reset. With each micro step an
associated counter accumulates the programmed micro step resolution value usrs.
dx_ref_tolerance (IDX=%1101)
To allow the motor to drive near the reference point, it is possible to exclude a range of steps from the
stop switch function. This parameter is important to disable stopping forced by reference switches during
reference position search. The parameter affects interrupt conditions as described before.
x_latched (IDX=%1110)
This read-only register stores the actual position if a change of the reference switch is detected. The
reference switch is defined by the bit REF_RnL of the configuration register lp & ref_conf & ramp_mode
(IDX=%1010). To initialize this position storage mechanism one simply has to write to the (read-only)
register. Then the actual position is saved in the register with the next change of the reference switch
status. The bit lp signals if latching of the position is pending.
Copyright © 2000, TRINAMIC Microchips GmbH
TRINAMIC
M I C R O C H I P S
0
0
0
0
1
1
1
1
usrs
0
0
1
1
0
0
1
1
R[Hz] = f_clk[Hz] * velocity / ( 2^pulse_div * 2048 * 32 )
R[Hz/s] = f_clk[Hz] * a_max / 256 / ( 2^ramp_div * 2048 * 32 ).
0
1
0
1
0
1
0
1
[micro steps /
full step]
16
32
64
64
1
2
4
8
5 (MSB), 4, 3, 2, 1, 0 (LSB)
5 (MSB), 4, 3, 2, 1, 0 (LSB)
significant DAC bits
(controlling current
5 (MSB), 4, 3, 2, 1
5 (MSB), 4, 3, 2
5 (MSB), 4, 3
amplitude)
5 (MSB), 4
5 (MSB)
-
full step (constant current amplitude)
micro stepping
comment
half step
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