S1M8831A Samsung Semiconductor, Inc., S1M8831A Datasheet - Page 26

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S1M8831A

Manufacturer Part Number
S1M8831A
Description
Fractional-n Rf/integer-n If Dual Pll Frequency Synthesizer
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
S1M8831A/33
foLD Control
— When the PLL is locked and the analog lock detect mode is selected, the foLD output is HIGH, with narrow
Lock Detector (LD)
There is analog mode for S1M8831A/33. The foLD bits, RF_N[5:2], are used to select the lock detection mode
and to output the selected lock signal through the foLD pin.
The foLD output becomes HIGH with narrow pulsed LOW while both RF and IF PLLs are locked and thereby the
output should be low-pass filtered for a DC locked voltage HIGH.
26
Control Words
pulses LOW.
foLD[3]
foLD
X
X
X
X
0
0
0
0
1
1
1
1
foLD[2]
Control Bits
RF_N[5:2]
0
0
0
0
1
1
1
1
0
0
0
0
foLD[1]
Acronym
0
0
1
1
0
0
1
1
0
0
1
1
foLD
Select LDs and monitoring mode of
internal counters.
foLD[0]
0
1
0
1
0
1
0
1
0
1
0
1
LOW (0)
Disabled (default LOW)
RF and IF analog lock detect
Reserved test mode
Reserved test mode
Reserved test mode
IF R counter output
IF N counter output
RF R counter output
RF N counter output
Reserved test mode
Reserved test mode
Reserved test mode
FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
HIGH (1)
foLD Output State
Lock Detector(LD),
Comments
Test Mode

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