S1M8831A Samsung Semiconductor, Inc., S1M8831A Datasheet - Page 13

• Manufacturer Part Number: S1M8831A
• Description: Fractional-n Rf/integer-n If Dual Pll Frequency Synthesizer
• Manufacturer: Samsung Semiconductor, Inc.

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
S1M8831A/33
When the PLL is in the locked state, the RF VCO's frequency will be N
+ N
times the comparison
INT
FRAC
frequency, where N
is the integer divide ratio and N
is the fractional component.
INT
FRAC
The S1M8831A/33 has new improved features compared to conventional Integer-N PLLs.
The Fractional-N PLL is available for the RF. The fractional synthesis allows the PFD comparison frequency to
be increased while maintaining the same channel frequency as in AMPS and IS-95A/B/C. It makes possible to
widen a loop bandwidth as wide as 20kHz or more for a faster lock-up time and to improve in-band phase noise
performance due to a reduced divide ratio N. Such S1M8831A/33 in the Fractional-N mode is suitable for CDMA,
GSM and Korean PCS band applications.
Also, from the programmability of the charge pump, the user can easily design a stable loop due to free selection
of loop components and reach to a low spurs, a low power PLLs due to an optimized current selection.
Prescaler
The RF/IF prescaler consists of a differential input buffer and ECL frequency dividers. The input buffer amplifies
an input signal from an external VCO to the required level set by sensitivity requirements. The output of the
amplifier delivers a differential signal to the divider with the correct DC level. The buffer may be either single-
ended or differentially driven. The single-ended operation is preferred in typical applications due to external VCO.
In this case, we recommend that the complementary input fin of the input buffer be AC coupled to ground through
external capacitors, even though it is internally coupled to ground via an internal 10pF capacitor. The other input
pin fin of the buffer also needs external capacitor for decoupling the DC component and controlling the input
power level.
The RF prescalers of S1M8831A and S1M8833 provide 8/9 and 16/17 prescaler ratio, respectively. The IF
prescaler of S1M8831A/33 contains 8/9 dual modulus prescaler.
Reference Oscillator Inputs
The reference oscillator frequency is provided by an external reference such as TCXO the OSCin and OSCx
pins. When the OSC bit is LOW, the oscillator input pins (OSCin and OSCx) drive the IF R and R counters
separately. When the OSC bit is HIGH, on the other hand, the oscillator input pin OSCin drives both IF R and RF
R counters.
Programmable Dividers (RF/IF N Counters)
The RF N counter can be configured as a fractional counter. The fractional-N counter is selected when the Frac-
N_SEL bit becomes HIGH.
In the fractional mode, the S1M8831A is capable of offering a continuous integer divide range from 72 to 1008
and the S1M8833 offering a continuous integer divide range from 161 to 168.
The S1M8831A/33 IF N counter supports an integer counter mode only, not including fractional counter, and is
capable of operating from 45MHz to 520MHz offering a continuous integer divide range from 72 to 32767.
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