S1M8831A Samsung Semiconductor, Inc., S1M8831A Datasheet - Page 15

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S1M8831A

Manufacturer Part Number
S1M8831A
Description
Fractional-n Rf/integer-n If Dual Pll Frequency Synthesizer
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
PROGRAMMING DESCRIPTION
The S1M8831A/33 can be programmed via the serial bus interface. The interface is made of 3 functional signals:
clock, data, and latch enable(LE). Serial data is moved into the 24-bit shift register on the rising edge of the
clock. These data enters MSB first. When LE goes HIGH, data in the shift register is moved into one of the 4
latches (by the 2-bit control).
Control Bit Map (CTL[1:0])
Data Bit Map (DATA[23:2])
NOTE: Test bits are reserved and should be set to be zero(Low) for normal usage.
RIF_R
IF_N
RF_N
RF_Frac
MSB
First Bit
TEST
RF_CTL_WORD
RF_NA_CNTR(4 bits)
CTL2(CTL[1])
23
OSC
0
0
1
1
22
21
TEST
IF_CTL_
WORD
20
CMOS
TEST
Control Bits
19
IF_CP_
18
WORD
17
Data Flow (MSB First)
DATA[23:2]
RF_CP_WORD
16
CTL1(CTL[0]
15
Register Bit Location
14
0
1
0
1
13
IF_NB_CNTR(3 bits)
12
FRAC_CNTR(17 bits)
11
RF_NB_CNTR(7 bits)
IF_R_CNTR(15 bits)
10
9
RF/IF R counter
IF N counter
RF N counter
RF Frac counter
8
7
6
Data Location
5
FoLD(4 bits)
IF_NA_CNT
4
R(3 bits)
CTL[1:0]
3
S1M8831A/33
2
LSB
Last Bit
0
0
1
1
1
15
0
1
0
1
0

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