CM6824IS Champion Microelectronic Corp., CM6824IS Datasheet - Page 13

• Manufacturer Part Number: CM6824IS
• Description: Low Start-Up Current PFC/PWM Controller Combo
• Manufacturer: Champion Microelectronic Corp.

where C
t
It is important that the time constant of the PWM soft-start
allow the PFC time to generate sufficient output power for
the PWM section. The PWM start-up delay should be at
least 5ms.
Solving for the minimum value of C
C
Caution should be exercised when using this minimum soft
start capacitance value because premature charging of the
SS capacitor and activation of the PWM section can result if
VFB is in the hysteresis band of the V
start-up. The magnitude of V
line voltage and nominal PFC output voltage. Typically, a
1.0µF soft start capacitor will allow time for V
out to reach their nominal values prior to activation of the
PWM section at line voltages between 90Vrms and
265Vrms.
Generating V
After turning on CM6824 at 13V, the operating voltage can
vary from 10V to 19.4V. The threshold voltage of VCC OVP
comparator is 19.4V. The hysteresis of VCC OVP is 1.5V.
When VCC see 19.4V, PFCOUT will be low, and PWM
section will not be disturbed. That’s the two ways to
generate VCC. One way is to use auxiliary power supply
around 15V, and the other way is to use bootstrap winding
to self-bias CM6824 system. The bootstrap winding can be
either taped from PFC boost choke or from the transformer
of the DC to DC stage.
2002/09/20
DEALY
SS
= 5ms x
is the desired start-up delay.
SS
is the required soft start capacitance, and the
CC
Preliminary
1.25V
20
A
= 80nF
FB
at start-up is related both to
Rev. 1.1
SS
:
IN
OK comparator at
L
OW
FB
and PFC
S
Champion Microelectronic Corporation
TART-
U
P
C
The ratio of winding transformer for the bootstrap should be
set between 18V and 15V. A filter network is recommended
between VCC (pin 13) and bootstrap winding. The resistor of
the filter can be set as following.
R
I
If anything goes wrong, and VCC goes beyond 19.4V, the
PFC gate (pin 12) drive goes low and the PWM gate drive
(pin 11) remains function. The resistor’s value must be
chosen to meet the operating current requirement of the
CM6824 itself (5mA, max.) plus the current required by the
two gate driver outputs.
EXAMPLE:
With a wanting voltage called, V
and the CM6824 driving a total gate charge of 90nC at
100kHz (e.g. 1 IRF840 MOSFET and 2 IRF820 MOSFET),
the gate driver current required is:
I
R
R
Choose R
The CM6824 should be locally bypassed with a 1.0µF
ceramic capacitor. In most applications, an electrolytic
capacitor of between 47µF and 220µF is also required across
the part, both for filtering and as part of the start-up bootstrap
circuitry.
URRENT
OP
GATEDRIVE
FILTER
BIAS
BIAS
= 3mA (typ.)
=
=
x I
5mA
V
18V
VCC
= 100kHz x 90nC = 9mA
BIAS
BIAS
I
CC
PFC/PWM C
~ 2V, I
= 214Ω
9mA
15V
I
V
G
CC
VCC
= I
OP
+ (Q
BIAS
ONTROLLER
PFCFET
,of 18V, a VCC of 15V
+ Q
PWMFET
CM6824
Page 13
C
) x fsw
OMBO