CM6824IS Champion Microelectronic Corp., CM6824IS Datasheet - Page 10

• Manufacturer Part Number: CM6824IS
• Description: Low Start-Up Current PFC/PWM Controller Combo
• Manufacturer: Champion Microelectronic Corp.

Error Amplifier Compensation
The PWM loading of the PFC can be modeled as a
negative resistor; an increase in input voltage to the PWM
causes a decrease in the input current. This response
dictates the proper compensation of the two
transconductance error amplifiers. Figure 2 shows the types
of compensation networks most commonly used for the
voltage and current error amplifiers, along with their
respective return points. The current loop compensation is
returned to V
PFC: as the reference voltage comes up from zero volts, it
creates a differentiated voltage on I
PFC from immediately demanding a full duty cycle on its
boost converter.
PFC Voltage Loop:
There are two major concerns when compensating the
voltage loop error amplifier, V
response. Optimizing interaction between transient
response and stability requires that the error amplifier’s
open-loop crossover frequency should be 1/2 that of the
line frequency, or 23Hz for a 47Hz line (lowest anticipated
international power frequency). The gain vs. input voltage
of the CM6824’s voltage error amplifier, V
specially shaped non-linearity such that under steady-state
operating conditions the transconductance of the error
amplifier is at a local minimum. Rapid perturbation in line or
load conditions will cause the input to the voltage error
amplifier (V
this happens, the transconductance of the voltage error
amplifier will increase significantly, as shown in the Typical
Performance Characteristics. This raises the
gain-bandwidth product of the voltage loop, resulting in a
much more rapid voltage loop response to such
perturbations than would occur with a conventional linear
gain characteristics.
2002/09/20
FB
REF
) to deviate from its 2.5V (nominal) value. If
Preliminary
to produce a soft-start characteristic on the
EAO
; stability and transient
Rev. 1.1
EAO
which prevents the
EAO
L
OW
has a
Figure 1. PFC Section Block Diagram
S
Champion Microelectronic Corporation
TART-
U
P
C
The Voltage Loop Gain (S)
Z
GM
P
V
380V.
C
PFC Current Loop:
The current amplifier, I
the voltage error amplifier, V
of crossover frequency. The crossover frequency of the
current amplifier should be at least 10 times that of the
voltage amplifier, to prevent interaction with the voltage loop.
It should also be limited to less than 1/6th that of the
switching frequency, e.g. 16.7kHz for a 100kHz switching
frequency.
The Current Loop Gain (S)
URRENT
CV
IN
OUTDC
DC
V
: Average PFC Input Power
S
: Compensation Net Work for the Voltage Loop
V
v
: PFC Boost Output Capacitor
: Transconductance of VEAO
V
V
V
*
OUTDC
OUTDC
D
: PFC Boost Output Voltage; typical designed value is
L
OUT
EAO
ISENSE
OFF
*
2
*
2
P
*
*
5 .
PFC/PWM C
IN
*
R
V
V
*
S
V
V
OUT
2
*
D
FB
I
EAO
5 .
EAO
GM
OFF
V
*
*
EAO
*
S
I
*
V
*
compensation is similar to that of
V
Z
EAO
I
C
EAO
FB
I
SENSE
CI
EAO
DC
with exception of the choice
*
ONTROLLER
GM
V
*
Z
CM6824
CV
Page 10
C
OMBO