CM6824IS Champion Microelectronic Corp., CM6824IS Datasheet - Page 12

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CM6824IS

Manufacturer Part Number
CM6824IS
Description
Low Start-Up Current PFC/PWM Controller Combo
Manufacturer
Champion Microelectronic Corp.
Datasheet
Oscillator (RAMP1)
The oscillator frequency is determined by the values of R
and C
oscillator output clock:
f
The dead time of the oscillator is derived from the following
equation:
t
at V
t
The dead time of the oscillator may be determined using:
t
The dead time is so small (t
operating frequency can typically be approximately by:
f
EXAMPLE:
For the application circuit shown in the datasheet, with the
oscillator running at:
f
Solving for C
components values, C
The dead time of the oscillator adds to the Maximum PWM
Duty Cycle (it is an input to the Duty Cycle Limiter). With
zero oscillator dead time, the Maximum PWM Duty Cycle is
typically 45%. In many applications, care should be taken
that C
Duty Cycle beyond 50%. This can be accomplished by
using a stable 390pF capacitor for C
PWM Section
Pulse Width Modulator
The PWM section of the CM6824 is straightforward, but
there are several points which should be noted. Foremost
among these is its inherent synchronization to the PFC
section of the device, from which it also derives its basic
timing. The PWM is capable of current-mode or
voltage-mode operation. In current-mode applications, the
PWM ramp (RAMP2) is usually derived directly from a
current sensing resistor or current transformer in the
primary of the output stage, and is thereby representative
2002/09/20
OSC
RAMP
RAMP
DEADTIME
OSC
OSC
REF
=
=
= 100kHz =
= C
= C
T
T
, which determine the ramp and off-time of the
t
= 7.5V:
t
not be made so large as to extend the Maximum
RAMP
RAMP
=
T
T
1
x R
x R
5.5mA
2.5V
T
Preliminary
T
T
x R
1
t
DEADTIME
x In
x 0.51
t
T
RAMP
yields 1.96 x 10
x C
1
V
V
T
REF
REF
T
= 390pF, and R
= 450 x C
1.25
3.75
RAMP
>> t
T
Rev. 1.1
-5
T
DEADTIME
. Selecting standard
.
T
= 51.1kΩ
L
OW
) that the
S
Champion Microelectronic Corporation
TART-
T
U
P
C
of the current flowing in the converter’s output stage.
DCI
typically connected to RAMP2 in such applications. For
voltage-mode, operation or certain specialized applications,
RAMP2 can be connected to a separate RC timing network
to generate a voltage ramp against which V
compared. Under these conditions, the use of voltage
feedforward from the PFC buss can assist in line regulation
accuracy and response. As in current mode operation, the
DC I
No voltage error amplifier is included in the PWM stage of
the CM6824, as this function is generally performed on the
output side of the PWM’s isolation boundary. To facilitate the
design of optocoupler feedback circuitry, an offset has been
built into the PWM’s RAMP2 input which allows V
command a zero percent duty cycle for input voltages below
1.25V.
PWM Current Limit
The DC I
limiter for the PWM section. Should the input voltage at this
pin ever exceed 1V, the output flip-flop is reset by the clock
pulse at the start of the next PWM power cycle. Beside, the
cycle-by-cycle current, when the DC ILIMIT triggered the
cycle-by-cycle current, it also softly discharge the voltage of
soft start capacitor. It will limit PWM duty cycle mode.
Therefore, the power dissipation will be reduced during the
dead short condition.
V
The V
and inhibits the PWM if this voltage on V
nominal 2.45V. Once this voltage reaches 2.45V, which
corresponds to the PFC output capacitor being charged to its
rated boost voltage, the soft-start begins.
PWM Control (RAMP2)
When the PWM section is used in current mode, RAMP2 is
generally used as the sampling point for a voltage
representing the current on the primary of the PWM’s output
transformer, derived either by a current sensing resistor or a
current transformer. In voltage mode, it is the input for a
ramp voltage generated by a second set of timing
components (R
of zero volts and should have a peak value of approximately
5V. In voltage mode operation, feedforward from the PFC
output buss is an excellent way to derive the timing ramp for
the PWM stage.
Soft Start
Start-up of the PWM is controlled by the selection of the
external capacitor at SS. A current source of 20µA supplies
the charging current for the capacitor, and start-up of the
PWM begins at 1.25V. Start-up delay can be programmed by
the following equation:
C
URRENT
IN
SS
OK Comparator
LIMIT
= t
LIMIT
IN
DELAY
, which provides cycle-by-cycle current limiting, is
OK comparator monitors the DC output of the PFC
input is used for output stage overcurrent protection.
LIMIT
x
PFC/PWM C
pin is a direct input to the cycle-by-cycle current
1.25V
RAMP2
20
A
, C
RAMP2
),that will have a minimum value
ONTROLLER
FB
is less than its
DC
CM6824
will be
Page 12
DC
C
to
OMBO

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