STG3000X STMicroelectronics, STG3000X Datasheet - Page 55
STG3000X
Manufacturer Part Number
STG3000X
Description
128-BIT 3D MULTIMEDIA ACCELERATOR
Manufacturer
STMicroelectronics
Datasheet
1.STG3000X.pdf
(77 pages)
- Current page: 55 of 77
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128-BIT 3D MULTIMEDIA ACCELERATOR
11.6 TV OUTPUT SUPPORT
Reference clock options
The RIVA 128 supports two synthesizer reference
clock frequencies; 13.5MHz and 14.31818MHz.
The reference clock frequency is determined by a
crystal or reference clock connected to the XTA-
LIN and XTALOUT pins. Where TV-out is support-
ed, XTALOUT should be driven by a 13.5MHz ref-
erence clock derived from an external NTSC/PAL
clock source as illustrated in Figure 59. The clock
frequency should match the power-on configura-
tion setting described in Section 10, page 49.
PAL/NTSC TV interface
The RIVA 128 supports TV output through an ex-
ternal Analog Devices AD722 PAL/NTSC RGB
encoder chip as shown in Figure 59. A MicroClock
Figure 59. TV output implementation
220
330
27pF
27pF
13.50000MHz
5V
crystal
XTALIN
XTALOUT
X1/ICLK
X2
Clock Source
NTSC/PAL
RIVA 128
MK2715
VIDHSYNC
REFOUT
4XCLK
G
R
B
33
33
75
MK2715 NTSC/PAL clock chip provides a com-
mon source for synchronization of the pixel and
subcarrier clocks. In TV output modes the RIVA
128 XTALOUT pin must be externally driven from
the MK2715 reference clock output, with XTALIN
tied to GND.
The MK2715 requires a number of external com-
ponents for proper operation. For crystal input a
parallel resonant 13.5000MHz crystal is recom-
mended, with a frequency tolerance of 50ppm or
better. Capacitors should be connected from X1
and X2 to GND as shown in Figure 59. Alternative-
ly a clock input (e.g. ClockCan) can be connected
to X1, leaving X2 disconnected. Further details are
given in the MK2715 datasheet [8].
RIN
GIN
BIN
HSYNC
FIN
RGB Encoder
AD722 TV
CVOUT
YOUT
COUT
220 F
220 F
220 F
RIVA 128
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75
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