CC2420 Chipcon AS, CC2420 Datasheet - Page 35

• Manufacturer Part Number: CC2420
• Description: 2.4 GHz RF Transceiver for IEEE 802.15.4 and ZigBee
• Manufacturer: Chipcon AS

Buffered transmit mode
In buffered transmit mode (TX_MODE 0),
the 128 byte TXFIFO, located in
RAM, is used to buffer data before
transmission.
(defined in the Frame Format section
below) is automatically inserted before the
length field during transmission. The
length field must always be the first byte
written to the transmit buffer for all frames.
Writing one or multiple bytes to the
TXFIFO is described in the FIFO access
section on page 27. Reading data from the
TXFIFO is possible with RAM access, but
this does not remove the byte from the
FIFO.
Transmission is enabled by issuing a
STXON or STXONCCA command strobe.
See the Radio control state machine
section on page 39 for an illustration of
how the transmit command strobes affect
the state of
is ignored if the channel is busy. See the
Clear Channel Assessment section on
page 46 for details on CCA.
The preamble sequence is started 12
symbol periods after the command strobe.
After the programmable start of frame
delimiter has been transmitted, data is
fetched from the TXFIFO.
A TXFIFO underflow is issued if too few
bytes
Transmission
stopped. The underflow is indicated in the
TX_UNDERFLOW
returned during each address byte and
each byte written to the TXFIFO. The
underflow bit is only cleared by issuing a
SFLUSHTX command strobe.
The TXFIFO can only contain one data
frame at a given time.
After complete transmission of a data
frame, the TXFIFO is automatically refilled
with the last transmitted frame. Issuing a
new STXON or STXONCCA command
strobe will then cause
the last frame.
Writing to the TXFIFO after a frame has
been transmitted will cause the TXFIFO to
be automatically flushed before the new
Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17
are
CC2420
written
A
is
status
. The STXONCCA strobe
preamble
then
CC2420
to
bit,
the
automatically
to retransmit
which
sequence
TXFIFO.
CC2420
is
SmartRF
byte is written. The only exception is if a
TXFIFO underflow has occurred, when a
SFLUSHTX command strobe is required.
Buffered receive mode
In buffered receive mode (RX_MODE 0),
the 128 byte RXFIFO, located in
RAM, is used to buffer data received by
the demodulator. Accessing data in the
RXFIFO is described in the FIFO access
section on page 27.
The FIFO and FIFOP pins are used to
assist the microcontroller in supervising
the RXFIFO. Please note that the FIFO
and FIFOP pins are only related to the
RXFIFO, even if
mode.
Multiple data frames may be in the
RXFIFO simultaneously, as long as the
total number of bytes does not exceed
128.
See the RXFIFO overflow section on page
29 for details on how a RXFIFO overflow
is detected and signaled.
Un-buffered, serial mode
Un-buffered mode should be used for
evaluation / debugging purposes only.
Buffered mode is recommended for all
applications.
In un-buffered mode, the FIFO and FIFOP
pins are reconfigured as data and data
clock pins. The TXFIFO and RXFIFO
buffers are not used in this mode. A
synchronous data clock is provided by
CC2420
pin is used as data input/output. The
FIFOP clock frequency is 250 kHz when
active. This is illustrated in Figure 20.
In
(MDMCTRL1.TX_MODE=1),
synchronisation sequence is inserted at
the start of each frame by hardware, as in
buffered mode. Data is sampled by
on the positive edge of FIFOP and should
be updated by the microcontroller on the
negative edge of FIFOP. See Figure 20
for an illustration of the timing in serial
transmit mode. The SFD and CCA pins
retain their normal operation also in serial
at the FIFOP pin, and the FIFO
serial
®
CC2420
transmit
CC2420
is in transmit
Page 35 of 85
CC2420
CC2420
mode
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