CC2400 Chipcon AS, CC2400 Datasheet - Page 21

• Manufacturer Part Number: CC2400
• Description: 2.4 GHz RF Transceiver
• Manufacturer: Chipcon AS

Note: The set-up- and hold-times refer to 50% of VDD.
Chipcon AS
SCLK:
SCLK, clock
frequency
SCLK low
pulse
duration
SCLK high
pulse
duration
CSn setup
time
CSn hold
time 1
CSn hold
time 2
SI setup time
SI hold time
Rise time
Fall time
Parameter
CSn:
Read or write a whole register continuously:
SO
SO
Read or write a whole register (16 bit):
SI
SI
Write to register:
Read from register:
Read or write n bytes from/to RF FIFO:
Read or write 8 MSB of a register:
t
sp
S7
S7
0
1
A6
S6
A6
S6
Figure 7. Configuration registers write and read operations via SPI
SmartRF
A5
S5
A5
S5
t
Symbol
ch
Command strobe:
A4
S4
A4
S4
t
f
t
ch,min
SCLK
cl,min
t
t
t
t
t
t
t
rise
fall
sp
ns
ps
sd
hd
t
cl
A3
S3
A3
S3
®
CC2400 PRELIMINARY Datasheet (rev. 1.1), 2003-10-02
A2
S2
A2
S2
CSn:
A1
S1
A1
S1
Min
300
25
25
25
25
25
25
A0
S0
A0
S0
Table 3. SPI timing specification
Figure 6. SPI timing diagram
X
ADDR
D
t
ADDR
ADDR
ADDR
ADDR
sd
R
Max
D
15
100
100
W
20
15 D
FIFO
D
W
R
14 D
14 D
DATA
DATA
DATA
DATA
W
R
13 D
13 D
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
8MSB
8MSB
8MSB
W
R
byte0
12 D
12 D
SmartRF
W
R
11 D
11 D
DATA
DATA
DATA
The minimum time SCLK must be low.
The minimum time SCLK must be high.
The minimum time CSn must be low before
positive edge of SCLK.
The minimum time CSn must be held low after the
last negative edge of SCLK.
In buffered mode: The minimum time CSn must be
held low after the last positive edge of SCLK.
The minimum time data on SI must be ready
before the positive edge of SCLK.
The minimum time data must be held at SI, after
the positive edge of SCLK.
The maximum rise time for SCLK and CSN
The maximum fall time for SCLK and CSn
W
R
10
10 D
8LSB
8LSB
byte1
D
W
R
9
9
DATA
DATA
D
D
W
R
8
8
t
hd
X
X
8MSB
byte2
D
X
D
R
7
W
7
DATA
DATA
D
D
Conditions
W
R
6
6
D
D
8LSB
byte3
®
W
R
5
5
D
D
W
R
4
4
...
...
CC2400
D
D
W
R
DATA
3
3
DATA
D
D
W
R
2
2
byte n-2
8MSB
D
D
Page 21 of 73
W
R
1
1
DATA
D
D
DATA
W
R
0
0
t
D
ps
byte n-1
t
R
8LSB
ns
15
X