MSAN-101 Zarlink Semiconductor, Inc., MSAN-101 Datasheet - Page 2

• Manufacturer Part Number: MSAN-101
• Description: Applications of the MT8804A 8 x 4 Analog Switch Array
• Manufacturer: Zarlink Semiconductor, Inc.

MSAN-101
The MT8804A in Detail
Configuration and Control
The 32 analog switches in the MT8804A are
configured in an 8 x 4 array as shown in Figure 1.
The eight switches in each column are connected to
an input/output Junctor (J
four switches of each row are connected to an input/
output Line (L
provides either isolation or transmission between its
associated line and junctor. The states of the
switches are controlled by a set of 32 latches
arranged in an 8 x 4 array corresponding to the
analog switch matrix. A logical HIGH stored in a latch
turns the corresponding switch ON, while a LOW
level turns the switch OFF. Data is asynchronously
written into the control latches whenever the Address
Enable (AE) input is HIGH. The latch outputs are
directly connected to the control inputs of the analog
switches. This direct interconnection results in a
“continuous read” of the control memory (latches) by
the analog switches.
Writing data into the control memory is done the
same as in a standard random access memory.
However, since no read control signals are required,
the control store can uniquely be treated as a write-
only-memory. The eight rows are selected by the
three Address (A
lines are decoded to a one-of-eight active high
format. The Address Enable (AE) input gates the
active output from the decoder to the enable inputs
of the latches in the addressed row. Levels present
on the Data (D
latched when the AE input is high. The data
corresponds directly to the states of the switches in
the addressed row; i.e. D
example, if junctor J
control inputs would be set up as follows: D
D
input HIGH would complete the connection. If
instead, both J
then the data inputs would be set to D
1010 and all else would remain the same. Similar
connections can be programmed for each of the
eight lines (L
memory are asynchronously reset whenever the
Master Reset (MR) input is HIGH. This results in all
analog switches being turned OFF, isolating all
junctors from all lines.
Power Supply Considerations
The MT8804A is equipped with on-chip logic level
converters to simplify the interface to logic circuits in
an analog switching system. The control inputs of the
device are driven from signals between V
A-18
1
D
0
= 0010, and A
0
- L
1
0
0
and J
0
7
- D
- A
). All of the latches in the control
- L
1
2
2
was to be connected to L
3
) inputs. The signals on these
3
7
A
) inputs are asynchronously
). Each crosspoint switch
1
were to be connected to L
0
A
0
0
to J
- J
= 100. Pulsing the AE
3
0
), and similarly, the
, D
1
to J
3
D
1
2
, etc. For
D
DD
1
4
3
D
, the
and
0
D
=
2
4
V
V
LOW. The analog or digital signals switched through
the array are allowed to swing between V
The power supply input voltages are defined as
follows:
5V
5V
0V
These voltages define the operating power supply
ranges of the digital and analog inputs and the logic
level converters. While the analog and digital power
supplies have identical limits the levels may be
different in a given application. For example, a valid
power supply configuration is as follows:
V
inputs are thus driven from a 5V CMOS logic system
while the signals on the lines and junctors can swing
from +5V to -6V. Caution must be used to meet all
three power supply constraints when deciding upon
a power supply configuration. The following is an
example of invalid power supply voltages: V
V
17V which exceeds the analog power supply range.
Analog Switch Characteristics
Like all monolithic analog switches, the MT8804A
exhibits a resistive characteristic when turned on.
This ‘ON’ resistance has two components, the actual
resistance of the channels of the MOS transistors
and the interconnect resistance between switches.
The potential variation of the total resistance with
temperature, power supply voltage and input signal
voltage is illustrated in Figure 2 and 3. Most
applications will not be adversely affected by the ON
resistance or its variations with these parameters.
However in some systems and applications with
more stringent specifications, special considerations
may be required. In cases such as driving through
the MT8804A into low impedance loads, or using the
device in a gain control circuit, it becomes necessary
to
equations.
Timing Measurements
Timing measurements such as propagation delays,
set up and hold times, etc. on the control inputs of
the MT8804A cannot be made directly as digital
outputs are not available. For this reason, these
SS
DD
DD
SS
. All of the control inputs are active HIGH with
consider
= 0V, and V
V
= +5V, V
being a logical HIGH level and V
V
V
DD
DD
SS
V
V
V
SS
EE
EE
SS
the
13V Digital
13V Analog
EE
8V Level Converters
= 0V and V
= -12V. In this case, V
switch
resistance
EE
= -6V. The control
SS
DD
DD
in
DD
and V
a logical
- V
design
= +5V,
EE
EE
=
.