MSAN-101 Zarlink Semiconductor, Inc., MSAN-101 Datasheet - Page 12

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MSAN-101

Manufacturer Part Number
MSAN-101
Description
Applications of the MT8804A 8 x 4 Analog Switch Array
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
MSAN-101
The circuit attenuation can be expressed as follows:
FOR ADDRESS (A
A
Where (A
Multi-Output 2
The circuit of Figure 11 provides up to 4 independent
output frequencies each of which is a binary
weighted multiple of a given input frequency. The
frequency division factor is represented by the binary
coded number of the address inputs of the
MT8804A. The division range for the circuit shown is
from 2
counters for frequency division and MT8804A’s to do
the switching. The four data inputs (D
which output line or lines are switched to a particular
frequency. The master reset (MR) when taken high
turns all switches off.
A-28
dB
= - (V
0
A
to 2
R
2
0
/V
A
7
1
. This range can be increased by adding
i
) dB = (3 X N
A
n
0
)
Programmable Frequency Divider
2
0
A
1
Address expressed as binary
Attenuation in dB of range
A
number
attenuator
2
)
10
2
= N10
+ A
R
) dB
0
to D
Figure 11 - Digital Application
3
) control
MT8804A Status Indicator
In applications where the MT8804A is controlled by a
hardwired
microprocessor system, it may be necessary or
desirable
interconnections. Since outputs of the control latches
are not available, a duplicate memory map is
required. An 8 x 4 array of light emitting diodes is
used to provide visual output of the information (See
Fig. 12). Control data written into the MT8804A is
copied into a Random Access Memory. The RAM
shown, the Goldstar GD4710B, is a CMOS device
organized as 16 four bit words.
MT8804A’s could be mapped with one device. The
RAM outputs can be used for control purposes as
well as visual outputs as shown in the diagram.
A scanning oscillator and counter (negative edge
triggered) are used to continuously read data out of
the RAM and refresh the LED matrix. The address
provided by this binary counter is decoded to a one
of eight active low output format by the 74HC138.
Drive current is provided by two 74HC367 hex 3-
state buffers. A variable duty cycle waveform may be
applied to the output enables to provide intensity
modulation. When data is written into the MT8804A
and RAM, the address is provided by the control
circuit. This address is isolated from the scanning
counter by the octal three state buffer, 74HC241.
to
control
have
circuit
a
record
as
opposed
of
As such, 2
line-junctor
to
a

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