MSK (Minimum Shift Keying) CML Microcircuits, MSK (Minimum Shift Keying) Datasheet - Page 11

• Manufacturer Part Number: MSK (Minimum Shift Keying)
• Description: Minimum Shift Keying and its Application to Wireless Data Transmission
• Manufacturer: CML Microcircuits

MSK and its Application to Wireless Data Transmission
3. Modeling
With increasing demand to move products quickly to market and to keep costs down, verifying a design through simulation
before building a breadboard saves time and money. The rapid growth of PC based simulation tools brings modeling
capability to a larger number of design engineers. The verification process can be broken down into three steps:
Ptolemy. Ptolemy is a UNIX based modeling tool that has been ported to run on a PC based UNIX system called Linux.
Linux and Ptolemy are freeware software packages and are available to be downloaded from several sites on the internet.
One such site is sunsite.unc.edu . The Ptolemy home page is http://ptolemy.eecs.berkeley.edu. Other archives sites can
be found using a web browser search engine. There are several other PC based modeling tools available from various
software companies.
The topics will include modeling MSK generation and detection (including a description of bit synchronization and carrier
detection) and modeling MSK at the system level. The conclusion will review the topics and results presented in this
document.
Discrete Time Models
All the models presented below are in the discrete time domain with successive samples uniformly spaced in time. The
complete transmitter->channel->receiver model is a multirate system, meaning that different sampling rates are used at
various stages in the model. For example the input data bits to be transmitted are sampled at the baud rate either 1200 or
2400 samples per second. The transmitter model’s output sample rate is N times the baud rate. The majority of the
receiver also runs at this N times rate. We typically used N=60 for the simulation results presented below. The emphasis
of this section is on modeling the basic functions included in a typical serial MSK modem offered by MX-COM. RF
interfaces and channel models are discussed to aid the reader in developing a complete system model however they are
not fully developed. In order to simulate frequency offsets between the transmitter and receiver an
interpolating/decimating block that changes the sample rate by M/N can be inserted between the transmitter and receiver.
For a 0.1% frequency offset let M=1000 and N=999. For in-depth coverage of multirate processing see [2].
in the model. The authors hope the pseudo-code will aid the readers in modeling and performing simulations of their
system designs. The pseudo-code is presented in a simple manner ignoring certain programming considerations such as
memory allocation, minimal buffering, type declaration, and scheduling of execution sequence. The models below focus
on the core algorithm not the implementation details. Various system simulation environments such as Ptolemy have their
own unique ways of dealing with these considerations which are beyond the scope of this paper.
The following conventions are used in the pseudo-code.
© 1997 MX COM Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
1.
2.
3.
The models, simulation, plots and pseudo code included in this section were derived using a modeling tool called
The scope of this document is to model an MSK communications scheme. Each topics will be broken up by function.
In the following sections, pseudo-code is provided to show the algorithm or function performed by each of the blocks
Creating a model of the design - Software modeling is a process of emulating hardware blocks of a design. Models can be
designed on a hierarchical building block approach. The lowest level models may emulate simple hardware functions such as
filters, amplifiers, or digital gates. Several lower level models can be joined together to create more complex models such as
modulators or demodulators. These higher level models can be joined together to create even higher level models such as a
complete communication system.
Simulating the function of the model - Simulation is the process of stimulating a model with various inputs and observing
the models response. The response of the model can be recorded in plots and data files for analysis.
Analyzing the plots and data collected from the simulation - Analysis is the process of verifying the plots and data against
design goals. This process helps the designer ensure correctness of or see how changes may improve the design.
//
=
+ , - , , /
Y[x]
outputs of each model are treated as an arrays. When referring to an input or output, increasing values of x
progress forward in time. Thus Input[x-1] would refer to the previous input to the model at sample x. If a block is
multirate, then it consumes more or fewer input samples than it creates output samples. For example the MSK
modulator model creates N output samples for every input bit. That is upon processing Input[i], it will create
Output N i , Output N i + 1 , Output N i + 2 , up to Output N i + 1 -1
starts a comment which ends at the end of the line
assignment or comparison depending on context
x is the index of array Y, x and Y are used here as an example - they may have any name. Inputs and
all have their normal meaning. Division is also shown as
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x
y
and multiplication as x y
Doc. # 20830084.001
APPLICATION