MSC100ABIRM Motorola / Freescale Semiconductor, MSC100ABIRM Datasheet - Page 57

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MSC100ABIRM

Manufacturer Part Number
MSC100ABIRM
Description
SC100 Application Binary Interface Reference Manual
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
This chapter describes the different behavior of the SC140 instructions in the Big-Endian and Little-Endian
memory system modes.
The SC140 DSP core supports Big and Little Endian architecture through a mode bit in its Exception and
Mode Register. This bit samples a core input signal when exiting the reset state and cannot be changed
during normal operation.
SC100 Application Binary Interface
Little-Endian:
“A computer architecture in which, within a given multi-byte numeric representation, bytes at lower
addresses have lower significance (the word is stored “little-end-first”).”
For example, the instruction
15-8 into address (r0+1).
Big-Endian:
“A computer architecture in which, within a given multi-byte numeric representation, the most
significant byte has the lowest address (the word is stored “big-end-first”). “
For example, the instruction
0-7 into address (r0+1).
MOVE.W D0,(r0)
MOVE.W D0,(r0)
Preliminary (April 2000)
will store bits 15-8 of D0 into address (r0) and bits
will store bits 0-7 of D0 into address (r0) and bits
Endian Support
Chapter 5
5-1

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