M25PE40-VMP6TP Numonyx, B.V., M25PE40-VMP6TP Datasheet - Page 44

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M25PE40-VMP6TP

Manufacturer Part Number
M25PE40-VMP6TP
Description
4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout
Manufacturer
Numonyx, B.V.
Datasheet
Reset
8
44/62
Reset
Driving Reset (Reset) Low while an internal operation is in progress will affect this operation
(write, program or erase cycle) and data may be lost.
All the Lock bits are reset to ‘0’ after a Reset Low pulse.
Table 12
Table 12.
1.
While decoding an instruction
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
Under completion of an Erase or Program
cycle of a PW, PP, PE, SSE, SE, BE
operation
Under completion of a WRSR operation
Device deselected (S High) and in Standby
mode
S remains Low while Reset is Low.
shows the status of the device after a Reset Low pulse.
Reset pulse occurred
Device status after a Reset Low pulse
Conditions:
(1)
: WREN,
Lock bits status
Reset to ‘0’
Reset to ‘0’
Reset to ‘0’
Reset to ‘0’
Same as POR
POR (after t
Same as POR
Internal logic
Equivalent to
Equivalent to
status
POR
W
)
could be modified
Addressed data
Write is correctly
Addressed data
Not significant
Not significant
completed
M25PE40

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