M25PE20-VMP6TP Numonyx, B.V., M25PE20-VMP6TP Datasheet - Page 24

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M25PE20-VMP6TP

Manufacturer Part Number
M25PE20-VMP6TP
Description
1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout
Manufacturer
Numonyx, B.V.
Datasheet
Instructions
6.2
24/64
Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 9.
Power-up
Write Disable (WRDI) instruction completion
Page Write (PW) instruction completion
Page Program (PP) instruction completion
Write Status Register (WRSR) instruction completion
Write to Lock Register (WRLR) instruction completion
Page Erase (PE) instruction completion
SubSector Erase (SSE) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Write Disable (WRDI) instruction sequence
S
C
D
Q
High Impedance
0
(Figure
1
2
Instruction
3
9) resets the Write Enable Latch (WEL) bit.
4
5
6
7
AI03750D
M25PE20, M25PE10

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