M25PE20-VMP6TP Numonyx, B.V., M25PE20-VMP6TP Datasheet - Page 17

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M25PE20-VMP6TP

Manufacturer Part Number
M25PE20-VMP6TP
Description
1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout
Manufacturer
Numonyx, B.V.
Datasheet
M25PE20, M25PE10
5
Memory organization
The M25PE20 memory is organized as:
The M25PE10 memory is organized as:
In the M25PE20 and M25PE10, each page can be individually:
The device is page or sector erasable (bits are erased from 0 to 1).
Table 5.
1024 pages (256 bytes each).
262,144 bytes (8 bits each)
64 subsectors (32 Kbits, 4,096 bytes each)
4 sectors (512 Kbits, 65,536 bytes each)
512 pages (256 bytes each).
131,074 bytes (8 bits each)
32 subsectors (32 Kbits, 4,096 bytes each)
2 sectors (512 Kbits, 65,536 bytes each)
programmed (bits are programmed from 1 to 0)
erased (bits are erased from 0 to 1)
written (bits are changed to either 0 or 1).
Sector
3
2
1
0
M25PE20 memory organization
Subsector
63
48
47
32
31
16
15
4
3
2
1
0
3F000h
2F000h
1F000h
0F000h
30000h
20000h
10000h
04000h
03000h
02000h
01000h
00000h
Address range
Memory organization
3FFFFh
30FFFh
2FFFFh
20FFFh
1FFFFh
10FFFh
0FFFFh
04FFFh
03FFFh
02FFFh
01FFFh
00FFFh
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