M25PE20-VMP6TP Numonyx, B.V., M25PE20-VMP6TP Datasheet - Page 23
M25PE20-VMP6TP
Manufacturer Part Number
M25PE20-VMP6TP
Description
1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout
Manufacturer
Numonyx, B.V.
Datasheet
1.M25PE20-VMP6TP.pdf
(64 pages)
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M25PE20, M25PE10
6.1
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Write (PW), Page
Program (PP), Page Erase (PE), and Sector Erase (SE) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Write Enable (WREN) instruction sequence
S
C
D
Q
High Impedance
0
(Figure
1
2
Instruction
3
8) sets the Write Enable Latch (WEL) bit.
4
5
6
7
AI02281E
Instructions
23/64
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